Delete Verilog_Code directory
13 files changed
tree: 5fc0853b0ac705185252b4dc714a82470c8bf535
  1. def/
  2. deps/
  3. docs/
  4. gds/
  5. lef/
  6. lib/
  7. mag/
  8. maglef/
  9. sdc/
  10. sdf/
  11. signoff/
  12. spef/
  13. spi/
  14. venv/
  15. verilog/
  16. LICENSE
  17. Makefile
  18. Readme
  19. README.md
README.md

This is test This is actuall This is type ofactuall