# Run configs
set ::env(PDK_ROOT) {/home/egor/.volare}
set ::env(BASE_SDC_FILE) {/opt/openeda/OpenLane/scripts/base.sdc}
set ::env(BOTTOM_MARGIN_MULT) {4}
set ::env(CARRY_SELECT_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/csa_map.v}
set ::env(CELLS_LEF) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef}
set ::env(CELL_PAD_EXCLUDE) {gf180mcu_fd_sc_mcu7t5v0__filltie_* gf180mcu_fd_sc_mcu7t5v0__filldecap_* gf180mcu_fd_sc_mcu7t5v0__fill_* gf180mcu_fd_sc_mcu7t5v0__endcap_*}
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
set ::env(CHECK_UNMAPPED_CELLS) {1}
set ::env(CLOCK_BUFFER_FANOUT) {16}
set ::env(CLOCK_PERIOD) {20}
set ::env(CLOCK_PORT) {wb_clk_i}
set ::env(CLOCK_TREE_SYNTH) {1}
set ::env(CLOCK_WIRE_RC_LAYER) {Metal4}
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
set ::env(CTS_CLK_BUFFER_LIST) {gf180mcu_fd_sc_mcu7t5v0__clkbuf_2 gf180mcu_fd_sc_mcu7t5v0__clkbuf_4 gf180mcu_fd_sc_mcu7t5v0__clkbuf_8}
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
set ::env(CTS_MAX_CAP) {0.5}
set ::env(CTS_REPORT_TIMING) {1}
set ::env(CTS_ROOT_BUFFER) {gf180mcu_fd_sc_mcu7t5v0__clkbuf_16}
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
set ::env(CTS_TARGET_SKEW) {200}
set ::env(CTS_TOLERANCE) {100}
set ::env(DATA_WIRE_RC_LAYER) {Metal2}
set ::env(DECAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__fillcap_*}
set ::env(DEFAULT_MAX_TRAN) {3}
set ::env(DEF_UNITS_PER_MICRON) {2000}
set ::env(DESIGN_CONFIG) {/home/egor/proj/gf180/gf180_efuse/openlane/config.json}
set ::env(DESIGN_IS_CORE) {0}
set ::env(DESIGN_NAME) {efuse_ctrl}
set ::env(DETAILED_ROUTER) {tritonroute}
set ::env(DIE_AREA) {0 0 2175 2350}
set ::env(DIODE_CELL) {gf180mcu_fd_sc_mcu7t5v0__antenna}
set ::env(DIODE_CELL_PIN) {I}
set ::env(DIODE_INSERTION_STRATEGY) {4}
set ::env(DIODE_PADDING) {2}
set ::env(DPL_CELL_PADDING) {2}
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/drc_exclude.cells}
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/drc_exclude.cells}
set ::env(DRT_MIN_LAYER) {Metal1}
set ::env(DRT_OPT_ITERS) {64}
set ::env(ECO_ENABLE) {0}
set ::env(ECO_FINISH) {0}
set ::env(ECO_ITER) {0}
set ::env(ECO_SKIP_PIN) {1}
set ::env(EXTRA_GDS_FILES) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.gds}
set ::env(EXTRA_LEFS) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.lef}
set ::env(FILL_CELL) {gf180mcu_fd_sc_mcu7t5v0__fill_*}
set ::env(FP_ASPECT_RATIO) {1}
set ::env(FP_CORE_UTIL) {50}
set ::env(FP_ENDCAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__endcap}
set ::env(FP_IO_HEXTEND) {-1}
set ::env(FP_IO_HLAYER) {Metal3}
set ::env(FP_IO_HLENGTH) {4}
set ::env(FP_IO_HTHICKNESS_MULT) {2}
set ::env(FP_IO_MIN_DISTANCE) {3}
set ::env(FP_IO_MODE) {1}
set ::env(FP_IO_UNMATCHED_ERROR) {1}
set ::env(FP_IO_VEXTEND) {-1}
set ::env(FP_IO_VLAYER) {Metal2}
set ::env(FP_IO_VLENGTH) {4}
set ::env(FP_IO_VTHICKNESS_MULT) {2}
set ::env(FP_PDN_AUTO_ADJUST) {0}
set ::env(FP_PDN_CHECK_NODES) {1}
set ::env(FP_PDN_CORE_RING) {0}
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
set ::env(FP_PDN_ENABLE_RAILS) {1}
set ::env(FP_PDN_HOFFSET) {16.65}
set ::env(FP_PDN_HORIZONTAL_HALO) {3}
set ::env(FP_PDN_HPITCH) {153.18}
set ::env(FP_PDN_HSPACING) {1.7}
set ::env(FP_PDN_HWIDTH) {1.6}
set ::env(FP_PDN_IRDROP) {1}
set ::env(FP_PDN_LOWER_LAYER) {Metal4}
set ::env(FP_PDN_RAILS_LAYER) {Metal1}
set ::env(FP_PDN_RAIL_OFFSET) {0}
set ::env(FP_PDN_RAIL_WIDTH) {0.6}
set ::env(FP_PDN_SKIPTRIM) {0}
set ::env(FP_PDN_UPPER_LAYER) {Metal5}
set ::env(FP_PDN_VERTICAL_HALO) {10}
set ::env(FP_PDN_VOFFSET) {20}
set ::env(FP_PDN_VPITCH) {190}
set ::env(FP_PDN_VSPACING) {8}
set ::env(FP_PDN_VWIDTH) {1.6}
set ::env(FP_SIZING) {absolute}
set ::env(FP_TAPCELL_DIST) {20}
set ::env(FP_TAP_HORIZONTAL_HALO) {3}
set ::env(FP_TAP_VERTICAL_HALO) {10}
set ::env(FP_WELLTAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__filltie}
set ::env(FULL_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/fa_map.v}
set ::env(GDS_FILES) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/gds/gf180mcu_fd_sc_mcu7t5v0.gds}
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
set ::env(GLB_CFG_FILE) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/config.tcl}
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {1}
set ::env(GLOBAL_ROUTER) {fastroute}
set ::env(GND_PIN) {VSS}
set ::env(GPIO_PADS_LEF) { /home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_io/lef/GF018green_ipio_5p0c_75_5lm.lef
}
set ::env(GPIO_PADS_VERILOG) { /home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_io/verilog/GF018green_ipio_5p0c_75_5lm.v
}
set ::env(GPL_CELL_PADDING) {0}
set ::env(GRT_ADJUSTMENT) {0.3}
set ::env(GRT_ALLOW_CONGESTION) {1}
set ::env(GRT_ANT_ITERS) {3}
set ::env(GRT_ESTIMATE_PARASITICS) {1}
set ::env(GRT_LAYER_ADJUSTMENTS) {0,0,0,0,0}
set ::env(GRT_MACRO_EXTENSION) {0}
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
set ::env(GRT_OBS) {Metal5 0 30.5 2175 53.5, Metal5 0 75.5 2175 98.5, Metal5 0 120.5 2175 143.5, Metal5 0 165.5 2175 188.5, Metal5 0 210.5 2175 233.5, Metal5 0 255.5 2175 278.5, Metal5 0 300.5 2175 323.5, Metal5 0 345.5 2175 368.5, Metal5 0 390.5 2175 413.5, Metal5 0 435.5 2175 458.5, Metal5 0 480.5 2175 503.5, Metal5 0 525.5 2175 548.5, Metal5 0 570.5 2175 593.5, Metal5 0 615.5 2175 638.5, Metal5 0 660.5 2175 683.5, Metal5 0 705.5 2175 728.5, Metal5 0 750.5 2175 773.5, Metal5 0 795.5 2175 818.5, Metal5 0 840.5 2175 863.5, Metal5 0 885.5 2175 908.5, Metal5 0 930.5 2175 953.5, Metal5 0 975.5 2175 998.5, Metal5 0 1020.5 2175 1043.5, Metal5 0 1065.5 2175 1088.5, Metal5 0 1110.5 2175 1133.5, Metal5 0 1155.5 2175 1178.5, Metal5 0 1200.5 2175 1223.5, Metal5 0 1245.5 2175 1268.5, Metal5 0 1290.5 2175 1313.5, Metal5 0 1335.5 2175 1358.5, Metal5 0 1380.5 2175 1403.5, Metal5 0 1425.5 2175 1448.5, Metal5 0 1470.5 2175 1493.5, Metal5 0 1515.5 2175 1538.5, Metal5 0 1560.5 2175 1583.5, Metal5 0 1605.5 2175 1628.5, Metal5 0 1650.5 2175 1673.5, Metal5 0 1695.5 2175 1718.5, Metal5 0 1740.5 2175 1763.5, Metal5 0 1785.5 2175 1808.5, Metal5 0 1830.5 2175 1853.5, Metal5 0 1875.5 2175 1898.5, Metal5 0 1920.5 2175 1943.5, Metal5 0 1965.5 2175 1988.5, Metal5 0 2010.5 2175 2033.5, Metal5 0 2055.5 2175 2078.5, Metal5 0 2100.5 2175 2123.5, Metal5 0 2145.5 2175 2168.5, Metal5 0 2190.5 2175 2213.5, Metal5 0 2235.5 2175 2258.5, Metal5 0 2280.5 2175 2303.5, Metal5 0 2325.5 2175 2348.5}
set ::env(GRT_OVERFLOW_ITERS) {50}
set ::env(IO_PCT) {0.2}
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC_mr.drc}
set ::env(KLAYOUT_PROPERTIES) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC.lyp}
set ::env(KLAYOUT_TECH) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC.lyt}
set ::env(KLAYOUT_XOR_GDS) {1}
set ::env(KLAYOUT_XOR_XML) {1}
set ::env(LEC_ENABLE) {0}
set ::env(LEFT_MARGIN_MULT) {12}
set ::env(LIB_FASTEST) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_5v50.lib}
set ::env(LIB_SLOWEST) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__ss_125C_4v50.lib}
set ::env(LIB_SYNTH) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(LIB_TYPICAL) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(LOGS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs}
set ::env(LVS_CONNECT_BY_LABEL) {1}
set ::env(LVS_INSERT_POWER_PINS) {1}
set ::env(MACRO_BLOCKAGES_LAYER) {Metal1 Metal2 Metal3 Metal4 Metal5}
set ::env(MACRO_PLACEMENT_CFG) {macro_placement.cfg}
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
set ::env(MAGIC_DEF_LABELS) {1}
set ::env(MAGIC_DEF_NO_BLOCKAGES) {1}
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
set ::env(MAGIC_DRC_USE_GDS) {1}
set ::env(MAGIC_EXT_USE_GDS) {0}
set ::env(MAGIC_GENERATE_GDS) {1}
set ::env(MAGIC_GENERATE_LEF) {1}
set ::env(MAGIC_GENERATE_MAGLEF) {1}
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
set ::env(MAGIC_MAGICRC) {/home/egor/.volare/gf180mcuC/libs.tech/magic/gf180mcuC.magicrc}
set ::env(MAGIC_PAD) {0}
set ::env(MAGIC_TECH_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/magic/gf180mcuC.tech}
set ::env(MAGIC_WRITE_FULL_LEF) {0}
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
set ::env(METAL_LAYER_NAMES) {Metal1 Metal2 Metal3 Metal4 Metal5}
set ::env(NETGEN_SETUP_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/netgen/gf180mcuC_setup.tcl}
set ::env(NO_SYNTH_CELL_LIST) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/no_synth.cells}
set ::env(OPENLANE_VERBOSE) {0}
set ::env(PDKPATH) {/home/egor/.volare/gf180mcuC}
set ::env(PLACE_SITE) {GF018hv5v_mcu_sc7}
set ::env(PLACE_SITE_HEIGHT) {3.92}
set ::env(PLACE_SITE_WIDTH) {0.56}
set ::env(PL_BASIC_PLACEMENT) {0}
set ::env(PL_ESTIMATE_PARASITICS) {1}
set ::env(PL_LIB) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(PL_MACRO_CHANNEL) {0 0}
set ::env(PL_MACRO_HALO) {100 100}
set ::env(PL_MAX_DISPLACEMENT_X) {2000}
set ::env(PL_MAX_DISPLACEMENT_Y) {2000}
set ::env(PL_OPTIMIZE_MIRRORING) {1}
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {1}
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {1}
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {1}
set ::env(PL_ROUTABILITY_DRIVEN) {1}
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
set ::env(PL_TARGET_DENSITY) {0.75}
set ::env(PL_TIME_DRIVEN) {1}
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
set ::env(PROCESS) {180}
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
set ::env(QUIT_ON_LONG_WIRE) {0}
set ::env(QUIT_ON_LVS_ERROR) {1}
set ::env(QUIT_ON_MAGIC_DRC) {1}
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
set ::env(QUIT_ON_TR_DRC) {1}
set ::env(RCX_CC_MODEL) {10}
set ::env(RCX_CONTEXT_DEPTH) {5}
set ::env(RCX_CORNER_COUNT) {1}
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
set ::env(RCX_MAX_RESISTANCE) {50}
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
set ::env(RCX_RULES) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.nom}
set ::env(RCX_RULES_MAX) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.max}
set ::env(RCX_RULES_MIN) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.min}
set ::env(REPORTS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports}
set ::env(RESULTS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results}
set ::env(RIGHT_MARGIN_MULT) {12}
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/rca_map.v}
set ::env(ROUTING_CORES) {24}
set ::env(RSZ_DONT_TOUCH_RX) {$^}
set ::env(RSZ_USE_OLD_REMOVER) {0}
set ::env(RT_MAX_LAYER) {Metal5}
set ::env(RT_MIN_LAYER) {Metal2}
set ::env(RUN_CVC) {1}
set ::env(RUN_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24}
set ::env(RUN_DRT) {1}
set ::env(RUN_FILL_INSERTION) {1}
set ::env(RUN_IRDROP_REPORT) {0}
set ::env(RUN_KLAYOUT) {0}
set ::env(RUN_KLAYOUT_DRC) {0}
set ::env(RUN_KLAYOUT_XOR) {0}
set ::env(RUN_LVS) {1}
set ::env(RUN_MAGIC) {1}
set ::env(RUN_MAGIC_DRC) {1}
set ::env(RUN_SPEF_EXTRACTION) {1}
set ::env(RUN_TAG) {RUN_2022.12.03_13.12.24}
set ::env(RUN_TAP_DECAP_INSERTION) {1}
set ::env(SCLPATH) {/home/egor/.volare/gf180mcuC/gf180mcu_fd_sc_mcu7t5v0}
set ::env(SPEF_EXTRACTOR) {openrcx}
set ::env(START_TIME) {2022.12.03_13.12.24}
set ::env(STA_REPORT_POWER) {1}
set ::env(STA_WRITE_LIB) {1}
set ::env(STD_CELL_GROUND_PINS) {VSS}
set ::env(STD_CELL_LIBRARY_CDL) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/cdl/gf180mcu_fd_sc_mcu7t5v0.cdl}
set ::env(STD_CELL_LIBRARY_OPT) {gf180mcu_fd_sc_mcu7t5v0}
set ::env(STD_CELL_POWER_PINS) {VDD}
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
set ::env(SYNTH_BIN) {yosys}
set ::env(SYNTH_BUFFERING) {1}
set ::env(SYNTH_CAP_LOAD) {72.91}
set ::env(SYNTH_CLK_DRIVING_CELL) {gf180mcu_fd_sc_mcu7t5v0__inv_4}
set ::env(SYNTH_CLK_DRIVING_CELL_PIN) {ZN}
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
set ::env(SYNTH_DRIVING_CELL) {gf180mcu_fd_sc_mcu7t5v0__inv_1}
set ::env(SYNTH_DRIVING_CELL_PIN) {ZN}
set ::env(SYNTH_ELABORATE_ONLY) {0}
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
set ::env(SYNTH_FLAT_TOP) {0}
set ::env(SYNTH_LATCH_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/latch_map.v}
set ::env(SYNTH_MAX_FANOUT) {10}
set ::env(SYNTH_MIN_BUF_PORT) {gf180mcu_fd_sc_mcu7t5v0__buf_1 I Z}
set ::env(SYNTH_NO_FLAT) {0}
set ::env(SYNTH_READ_BLACKBOX_LIB) {0}
set ::env(SYNTH_SCRIPT) {/opt/openeda/OpenLane/scripts/yosys/synth.tcl}
set ::env(SYNTH_SHARE_RESOURCES) {1}
set ::env(SYNTH_SIZING) {0}
set ::env(SYNTH_STRATEGY) {AREA 3}
set ::env(SYNTH_TIEHI_PORT) {gf180mcu_fd_sc_mcu7t5v0__tieh Z}
set ::env(SYNTH_TIELO_PORT) {gf180mcu_fd_sc_mcu7t5v0__tiel ZN}
set ::env(SYNTH_TIMING_DERATE) {0.05}
set ::env(TAKE_LAYOUT_SCROT) {0}
set ::env(TECH_LEF) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/techlef/gf180mcu_fd_sc_mcu7t5v0.tlef}
set ::env(TERMINAL_OUTPUT) {/dev/null}
set ::env(TMP_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp}
set ::env(TOP_MARGIN_MULT) {4}
set ::env(TRACKS_INFO_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/tracks.info}
set ::env(TRISTATE_BUFFER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/tribuff_map.v}
set ::env(USE_ARC_ANTENNA_CHECK) {1}
set ::env(USE_GPIO_PADS) {0}
set ::env(VDD_PIN) {VDD}
set ::env(VERILOG_FILES) {efuse_ctrl_fromvhdl.v ../macros/cells.v}
set ::env(VERILOG_FILES_BLACKBOX) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.v}
set ::env(WIRE_RC_LAYER) {Metal2}
set ::env(YOSYS_REWRITE_VERILOG) {0}
set ::env(cts_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/cts}
set ::env(cts_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/cts}
set ::env(cts_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/cts}
set ::env(cts_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/cts}
set ::env(eco_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/eco}
set ::env(eco_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/eco}
set ::env(eco_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/eco}
set ::env(eco_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/eco}
set ::env(floorplan_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/floorplan}
set ::env(floorplan_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/floorplan}
set ::env(floorplan_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/floorplan}
set ::env(floorplan_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/floorplan}
set ::env(placement_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/placement}
set ::env(placement_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/placement}
set ::env(placement_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/placement}
set ::env(placement_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/placement}
set ::env(routing_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/routing}
set ::env(routing_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/routing}
set ::env(routing_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing}
set ::env(routing_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing}
set ::env(signoff_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/signoff}
set ::env(signoff_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/signoff}
set ::env(signoff_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/signoff}
set ::env(signoff_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff}
set ::env(synthesis_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/synthesis}
set ::env(synthesis_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/synthesis}
set ::env(synthesis_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/synthesis}
set ::env(synthesis_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis}
set ::env(SYNTH_MAX_TRAN) {2.0}
set ::env(CURRENT_INDEX) 29
set ::env(CURRENT_DEF) /home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.def
set ::env(CURRENT_GUIDE) /home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing/18-global.guide
set ::env(CURRENT_NETLIST) /home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff/26-efuse_ctrl.nl.v
set ::env(CURRENT_POWERED_NETLIST) {0}
set ::env(CURRENT_ODB) /home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.odb
set ::env(PDK_ROOT) {/home/egor/.volare}
set ::env(BASE_SDC_FILE) {/opt/openeda/OpenLane/scripts/base.sdc}
set ::env(BASIC_PREP_COMPLETE) {1}
set ::env(BOTTOM_MARGIN_MULT) {4}
set ::env(CARRY_SELECT_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/csa_map.v}
set ::env(CELLS_LEF) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef}
set ::env(CELL_PAD_EXCLUDE) {gf180mcu_fd_sc_mcu7t5v0__filltie_* gf180mcu_fd_sc_mcu7t5v0__filldecap_* gf180mcu_fd_sc_mcu7t5v0__fill_* gf180mcu_fd_sc_mcu7t5v0__endcap_*}
set ::env(CHECK_ASSIGN_STATEMENTS) {0}
set ::env(CHECK_UNMAPPED_CELLS) {1}
set ::env(CLOCK_BUFFER_FANOUT) {16}
set ::env(CLOCK_NET) {wb_clk_i}
set ::env(CLOCK_PERIOD) {20}
set ::env(CLOCK_PORT) {wb_clk_i}
set ::env(CLOCK_TREE_SYNTH) {1}
set ::env(CLOCK_WIRE_RC_LAYER) {Metal4}
set ::env(COLORTERM) {truecolor}
set ::env(CONFIGS) {general.tcl checkers.tcl synthesis.tcl floorplan.tcl cts.tcl placement.tcl routing.tcl extraction.tcl}
set ::env(CORE_AREA) {6.72 15.68 2167.76 2332.4}
set ::env(CORE_HEIGHT) {2316.72}
set ::env(CORE_WIDTH) {2161.04}
set ::env(CTS_CLK_BUFFER_LIST) {gf180mcu_fd_sc_mcu7t5v0__clkbuf_2 gf180mcu_fd_sc_mcu7t5v0__clkbuf_4 gf180mcu_fd_sc_mcu7t5v0__clkbuf_8}
set ::env(CTS_CLK_MAX_WIRE_LENGTH) {0}
set ::env(CTS_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/placement/efuse_ctrl.def}
set ::env(CTS_DISABLE_POST_PROCESSING) {0}
set ::env(CTS_DISTANCE_BETWEEN_BUFFERS) {0}
set ::env(CTS_MAX_CAP) {0.5}
set ::env(CTS_REPORT_TIMING) {1}
set ::env(CTS_ROOT_BUFFER) {gf180mcu_fd_sc_mcu7t5v0__clkbuf_16}
set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) {50}
set ::env(CTS_SINK_CLUSTERING_SIZE) {25}
set ::env(CTS_TARGET_SKEW) {200}
set ::env(CTS_TOLERANCE) {100}
set ::env(CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff/26-efuse_ctrl.p.def}
set ::env(CURRENT_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing}
set ::env(CURRENT_GDS) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/signoff/efuse_ctrl.gds}
set ::env(CURRENT_GUIDE) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing/18-global.guide}
set ::env(CURRENT_INDEX) {29}
set ::env(CURRENT_LIB) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/mca/process_corner_nom/efuse_ctrl.lib}
set ::env(CURRENT_NETLIST) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff/26-efuse_ctrl.nl.v}
set ::env(CURRENT_ODB) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.odb}
set ::env(CURRENT_POWERED_NETLIST) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff/26-efuse_ctrl.pnl.v}
set ::env(CURRENT_SDC) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/13-efuse_ctrl.sdc}
set ::env(CURRENT_SDF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/mca/process_corner_nom/efuse_ctrl.sdf}
set ::env(CURRENT_SPEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/mca/process_corner_nom/efuse_ctrl.spef}
set ::env(CURRENT_STEP) {lvs}
set ::env(DATA_WIRE_RC_LAYER) {Metal2}
set ::env(DBUS_SESSION_BUS_ADDRESS) {unix:path=/run/user/1000/bus}
set ::env(DECAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__fillcap_*}
set ::env(DEFAULT_MAX_TRAN) {3}
set ::env(DEF_UNITS_PER_MICRON) {2000}
set ::env(DESIGN_CONFIG) {/home/egor/proj/gf180/gf180_efuse/openlane/config.json}
set ::env(DESIGN_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane}
set ::env(DESIGN_IS_CORE) {0}
set ::env(DESIGN_NAME) {efuse_ctrl}
set ::env(DESKTOP_SESSION) {gnome}
set ::env(DETAILED_ROUTER) {tritonroute}
set ::env(DIE_AREA) {0.0 0.0 2175.0 2350.0}
set ::env(DIODE_CELL) {gf180mcu_fd_sc_mcu7t5v0__antenna}
set ::env(DIODE_CELL_PIN) {I}
set ::env(DIODE_INSERTION_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.def}
set ::env(DIODE_INSERTION_STRATEGY) {4}
set ::env(DIODE_PADDING) {2}
set ::env(DISPLAY) {:0}
set ::env(DONT_USE_CELLS) {gf180mcu_fd_sc_mcu7t5v0__mux2_1 gf180mcu_fd_sc_mcu7t5v0__oai33_2 }
set ::env(DPL_CELL_PADDING) {2}
set ::env(DRC_EXCLUDE_CELL_LIST) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/drc_exclude.cells}
set ::env(DRC_EXCLUDE_CELL_LIST_OPT) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/drc_exclude.cells}
set ::env(DRT_MIN_LAYER) {Metal1}
set ::env(DRT_OPT_ITERS) {64}
set ::env(ECO_ENABLE) {0}
set ::env(ECO_FINISH) {0}
set ::env(ECO_ITER) {0}
set ::env(ECO_SKIP_PIN) {1}
set ::env(EXTRA_GDS_FILES) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.gds}
set ::env(EXTRA_LEFS) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.lef}
set ::env(EXT_NETLIST) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/signoff/efuse_ctrl.spice}
set ::env(FILL_CELL) {gf180mcu_fd_sc_mcu7t5v0__fill_*}
set ::env(FLOW_FAILED) {1}
set ::env(FP_ASPECT_RATIO) {1}
set ::env(FP_CORE_UTIL) {50}
set ::env(FP_ENDCAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__endcap}
set ::env(FP_IO_HEXTEND) {-1}
set ::env(FP_IO_HLAYER) {Metal3}
set ::env(FP_IO_HLENGTH) {4}
set ::env(FP_IO_HTHICKNESS_MULT) {2}
set ::env(FP_IO_MIN_DISTANCE) {3}
set ::env(FP_IO_MODE) {1}
set ::env(FP_IO_UNMATCHED_ERROR) {1}
set ::env(FP_IO_VEXTEND) {-1}
set ::env(FP_IO_VLAYER) {Metal2}
set ::env(FP_IO_VLENGTH) {4}
set ::env(FP_IO_VTHICKNESS_MULT) {2}
set ::env(FP_PDN_AUTO_ADJUST) {0}
set ::env(FP_PDN_CHECK_NODES) {1}
set ::env(FP_PDN_CORE_RING) {0}
set ::env(FP_PDN_CORE_RING_HOFFSET) {6}
set ::env(FP_PDN_CORE_RING_HSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_HWIDTH) {1.6}
set ::env(FP_PDN_CORE_RING_VOFFSET) {6}
set ::env(FP_PDN_CORE_RING_VSPACING) {1.7}
set ::env(FP_PDN_CORE_RING_VWIDTH) {1.6}
set ::env(FP_PDN_ENABLE_GLOBAL_CONNECTIONS) {1}
set ::env(FP_PDN_ENABLE_MACROS_GRID) {1}
set ::env(FP_PDN_ENABLE_RAILS) {1}
set ::env(FP_PDN_HOFFSET) {16.65}
set ::env(FP_PDN_HORIZONTAL_HALO) {3}
set ::env(FP_PDN_HPITCH) {153.18}
set ::env(FP_PDN_HSPACING) {1.7}
set ::env(FP_PDN_HWIDTH) {1.6}
set ::env(FP_PDN_IRDROP) {1}
set ::env(FP_PDN_LOWER_LAYER) {Metal4}
set ::env(FP_PDN_RAILS_LAYER) {Metal1}
set ::env(FP_PDN_RAIL_OFFSET) {0}
set ::env(FP_PDN_RAIL_WIDTH) {0.6}
set ::env(FP_PDN_SKIPTRIM) {0}
set ::env(FP_PDN_UPPER_LAYER) {Metal5}
set ::env(FP_PDN_VERTICAL_HALO) {10}
set ::env(FP_PDN_VOFFSET) {20}
set ::env(FP_PDN_VPITCH) {190}
set ::env(FP_PDN_VSPACING) {8}
set ::env(FP_PDN_VWIDTH) {1.6}
set ::env(FP_SIZING) {absolute}
set ::env(FP_TAPCELL_DIST) {20}
set ::env(FP_TAP_HORIZONTAL_HALO) {3}
set ::env(FP_TAP_VERTICAL_HALO) {10}
set ::env(FP_WELLTAP_CELL) {gf180mcu_fd_sc_mcu7t5v0__filltie}
set ::env(FULL_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/fa_map.v}
set ::env(GDMSESSION) {gnome}
set ::env(GDM_LANG) {ru_RU.UTF-8}
set ::env(GDS_FILES) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/gds/gf180mcu_fd_sc_mcu7t5v0.gds}
set ::env(GENERATE_FINAL_SUMMARY_REPORT) {1}
set ::env(GLB_CFG_FILE) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/config.tcl}
set ::env(GLB_OPTIMIZE_MIRRORING) {1}
set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(GLB_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_HOLD_SLACK_MARGIN) {0.05}
set ::env(GLB_RESIZER_MAX_CAP_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_SLEW_MARGIN) {10}
set ::env(GLB_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(GLB_RESIZER_SETUP_SLACK_MARGIN) {0.025}
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {1}
set ::env(GLOBAL_ROUTER) {fastroute}
set ::env(GND_NET) {VSS}
set ::env(GND_NETS) {VSS}
set ::env(GND_PIN) {VSS}
set ::env(GNOME_DESKTOP_SESSION_ID) {this-is-deprecated}
set ::env(GNOME_SETUP_DISPLAY) {:1}
set ::env(GNOME_TERMINAL_SCREEN) {/org/gnome/Terminal/screen/417f9199_5a5c_474b_8e46_3e0718de05f5}
set ::env(GNOME_TERMINAL_SERVICE) {:1.131}
set ::env(GPIO_PADS_LEF) { /home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_io/lef/GF018green_ipio_5p0c_75_5lm.lef
}
set ::env(GPIO_PADS_VERILOG) { /home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_io/verilog/GF018green_ipio_5p0c_75_5lm.v
}
set ::env(GPL_CELL_PADDING) {0}
set ::env(GRT_ADJUSTMENT) {0.3}
set ::env(GRT_ALLOW_CONGESTION) {1}
set ::env(GRT_ANT_ITERS) {3}
set ::env(GRT_ESTIMATE_PARASITICS) {1}
set ::env(GRT_LAYER_ADJUSTMENTS) {0,0,0,0,0}
set ::env(GRT_MACRO_EXTENSION) {0}
set ::env(GRT_MAX_DIODE_INS_ITERS) {1}
set ::env(GRT_OBS) {Metal5 0 30.5 2175 53.5, Metal5 0 75.5 2175 98.5, Metal5 0 120.5 2175 143.5, Metal5 0 165.5 2175 188.5, Metal5 0 210.5 2175 233.5, Metal5 0 255.5 2175 278.5, Metal5 0 300.5 2175 323.5, Metal5 0 345.5 2175 368.5, Metal5 0 390.5 2175 413.5, Metal5 0 435.5 2175 458.5, Metal5 0 480.5 2175 503.5, Metal5 0 525.5 2175 548.5, Metal5 0 570.5 2175 593.5, Metal5 0 615.5 2175 638.5, Metal5 0 660.5 2175 683.5, Metal5 0 705.5 2175 728.5, Metal5 0 750.5 2175 773.5, Metal5 0 795.5 2175 818.5, Metal5 0 840.5 2175 863.5, Metal5 0 885.5 2175 908.5, Metal5 0 930.5 2175 953.5, Metal5 0 975.5 2175 998.5, Metal5 0 1020.5 2175 1043.5, Metal5 0 1065.5 2175 1088.5, Metal5 0 1110.5 2175 1133.5, Metal5 0 1155.5 2175 1178.5, Metal5 0 1200.5 2175 1223.5, Metal5 0 1245.5 2175 1268.5, Metal5 0 1290.5 2175 1313.5, Metal5 0 1335.5 2175 1358.5, Metal5 0 1380.5 2175 1403.5, Metal5 0 1425.5 2175 1448.5, Metal5 0 1470.5 2175 1493.5, Metal5 0 1515.5 2175 1538.5, Metal5 0 1560.5 2175 1583.5, Metal5 0 1605.5 2175 1628.5, Metal5 0 1650.5 2175 1673.5, Metal5 0 1695.5 2175 1718.5, Metal5 0 1740.5 2175 1763.5, Metal5 0 1785.5 2175 1808.5, Metal5 0 1830.5 2175 1853.5, Metal5 0 1875.5 2175 1898.5, Metal5 0 1920.5 2175 1943.5, Metal5 0 1965.5 2175 1988.5, Metal5 0 2010.5 2175 2033.5, Metal5 0 2055.5 2175 2078.5, Metal5 0 2100.5 2175 2123.5, Metal5 0 2145.5 2175 2168.5, Metal5 0 2190.5 2175 2213.5, Metal5 0 2235.5 2175 2258.5, Metal5 0 2280.5 2175 2303.5, Metal5 0 2325.5 2175 2348.5}
set ::env(GRT_OVERFLOW_ITERS) {50}
set ::env(GTK_MODULES) {gail:atk-bridge}
set ::env(HOME) {/home/egor}
set ::env(IO_PCT) {0.2}
set ::env(KLAYOUT_DRC_KLAYOUT_GDS) {0}
set ::env(KLAYOUT_DRC_TECH_SCRIPT) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC_mr.drc}
set ::env(KLAYOUT_PROPERTIES) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC.lyp}
set ::env(KLAYOUT_TECH) {/home/egor/.volare/gf180mcuC/libs.tech/klayout/gf180mcuC.lyt}
set ::env(KLAYOUT_XOR_GDS) {1}
set ::env(KLAYOUT_XOR_XML) {1}
set ::env(LANG) {ru_RU.UTF-8}
set ::env(LANGUAGE) {ru_RU:ru}
set ::env(LAST_TIMING_REPORT_TAG) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/signoff/24-rcx_sta}
set ::env(LEC_ENABLE) {0}
set ::env(LEFT_MARGIN_MULT) {12}
set ::env(LIB_CTS) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/cts/cts.lib}
set ::env(LIB_FASTEST) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_5v50.lib}
set ::env(LIB_SLOWEST) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__ss_125C_4v50.lib}
set ::env(LIB_SYNTH) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis/trimmed.lib}
set ::env(LIB_SYNTH_COMPLETE) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(LIB_SYNTH_COMPLETE_NO_PG) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis/1-gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.no_pg.lib}
set ::env(LIB_SYNTH_MERGED) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis/merged.lib}
set ::env(LIB_SYNTH_NO_PG) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis/1-trimmed.no_pg.lib}
set ::env(LIB_TYPICAL) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(LOGNAME) {egor}
set ::env(LOGS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs}
set ::env(LS_COLORS) {rs=0:di=01;34:ln=01;36:mh=00:pi=40;33:so=01;35:do=01;35:bd=40;33;01:cd=40;33;01:or=40;31;01:mi=00:su=37;41:sg=30;43:ca=30;41:tw=30;42:ow=34;42:st=37;44:ex=01;32:*.tar=01;31:*.tgz=01;31:*.arc=01;31:*.arj=01;31:*.taz=01;31:*.lha=01;31:*.lz4=01;31:*.lzh=01;31:*.lzma=01;31:*.tlz=01;31:*.txz=01;31:*.tzo=01;31:*.t7z=01;31:*.zip=01;31:*.z=01;31:*.dz=01;31:*.gz=01;31:*.lrz=01;31:*.lz=01;31:*.lzo=01;31:*.xz=01;31:*.zst=01;31:*.tzst=01;31:*.bz2=01;31:*.bz=01;31:*.tbz=01;31:*.tbz2=01;31:*.tz=01;31:*.deb=01;31:*.rpm=01;31:*.jar=01;31:*.war=01;31:*.ear=01;31:*.sar=01;31:*.rar=01;31:*.alz=01;31:*.ace=01;31:*.zoo=01;31:*.cpio=01;31:*.7z=01;31:*.rz=01;31:*.cab=01;31:*.wim=01;31:*.swm=01;31:*.dwm=01;31:*.esd=01;31:*.jpg=01;35:*.jpeg=01;35:*.mjpg=01;35:*.mjpeg=01;35:*.gif=01;35:*.bmp=01;35:*.pbm=01;35:*.pgm=01;35:*.ppm=01;35:*.tga=01;35:*.xbm=01;35:*.xpm=01;35:*.tif=01;35:*.tiff=01;35:*.png=01;35:*.svg=01;35:*.svgz=01;35:*.mng=01;35:*.pcx=01;35:*.mov=01;35:*.mpg=01;35:*.mpeg=01;35:*.m2v=01;35:*.mkv=01;35:*.webm=01;35:*.webp=01;35:*.ogm=01;35:*.mp4=01;35:*.m4v=01;35:*.mp4v=01;35:*.vob=01;35:*.qt=01;35:*.nuv=01;35:*.wmv=01;35:*.asf=01;35:*.rm=01;35:*.rmvb=01;35:*.flc=01;35:*.avi=01;35:*.fli=01;35:*.flv=01;35:*.gl=01;35:*.dl=01;35:*.xcf=01;35:*.xwd=01;35:*.yuv=01;35:*.cgm=01;35:*.emf=01;35:*.ogv=01;35:*.ogx=01;35:*.aac=00;36:*.au=00;36:*.flac=00;36:*.m4a=00;36:*.mid=00;36:*.midi=00;36:*.mka=00;36:*.mp3=00;36:*.mpc=00;36:*.ogg=00;36:*.ra=00;36:*.wav=00;36:*.oga=00;36:*.opus=00;36:*.spx=00;36:*.xspf=00;36:}
set ::env(LVS_CONNECT_BY_LABEL) {1}
set ::env(LVS_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.def}
set ::env(LVS_INSERT_POWER_PINS) {1}
set ::env(MACRO_BLOCKAGES_LAYER) {Metal1 Metal2 Metal3 Metal4 Metal5}
set ::env(MACRO_PLACEMENT_CFG) {macro_placement.cfg}
set ::env(MAGIC_CONVERT_DRC_TO_RDB) {1}
set ::env(MAGIC_DEF_LABELS) {1}
set ::env(MAGIC_DEF_NO_BLOCKAGES) {1}
set ::env(MAGIC_DISABLE_HIER_GDS) {1}
set ::env(MAGIC_DRC_USE_GDS) {1}
set ::env(MAGIC_EXT_USE_GDS) {0}
set ::env(MAGIC_GDS) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/signoff/efuse_ctrl.magic.gds}
set ::env(MAGIC_GENERATE_GDS) {1}
set ::env(MAGIC_GENERATE_LEF) {1}
set ::env(MAGIC_GENERATE_MAGLEF) {1}
set ::env(MAGIC_INCLUDE_GDS_POINTERS) {0}
set ::env(MAGIC_MAGICRC) {/home/egor/.volare/gf180mcuC/libs.tech/magic/gf180mcuC.magicrc}
set ::env(MAGIC_PAD) {0}
set ::env(MAGIC_TECH_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/magic/gf180mcuC.tech}
set ::env(MAGIC_WRITE_FULL_LEF) {0}
set ::env(MAGIC_ZEROIZE_ORIGIN) {0}
set ::env(MAGTYPE) {maglef}
set ::env(MAX_METAL_LAYER) {5}
set ::env(MC_SDF_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/mca/sdf}
set ::env(MC_SPEF_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/mca/spef}
set ::env(MERGED_LEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/merged.nom.lef}
set ::env(METAL_LAYER_NAMES) {Metal1 Metal2 Metal3 Metal4 Metal5}
set ::env(NETGEN_SETUP_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/netgen/gf180mcuC_setup.tcl}
set ::env(NO_SYNTH_CELL_LIST) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/no_synth.cells}
set ::env(OL_INSTALL_DIR) {/opt/openeda/OpenLane/install}
set ::env(OPENLANE) {/opt/openeda/OpenLane/flow.tcl}
set ::env(OPENLANE_LOCAL_INSTALL) {1}
set ::env(OPENLANE_ROOT) {/opt/openeda/OpenLane}
set ::env(OPENLANE_VERBOSE) {0}
set ::env(OPENLANE_VERSION) {5035e1e6e2a58783683b6ca5b4e010f76394a3be}
set ::env(OPENROAD_BIN) {openroad}
set ::env(PARSITICS_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing/efuse_ctrl.def}
set ::env(PATH) {/opt/openeda/OpenLane/install/bin:/opt/openeda/OpenLane/install/venv/bin:/opt/openeda/bin/:/opt/openeda/OpenLane/install/bin/:/usr/local/bin:/usr/bin:/bin:/usr/games}
set ::env(PDK) {gf180mcuC}
set ::env(PDKPATH) {/home/egor/.volare/gf180mcuC}
set ::env(PDK_ROOT) {/home/egor/.volare}
set ::env(PDN_CFG) {/home/egor/proj/gf180/gf180_efuse/openlane/pdn_cfg.tcl}
set ::env(PLACEMENT_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/floorplan/7-pdn.def}
set ::env(PLACE_SITE) {GF018hv5v_mcu_sc7}
set ::env(PLACE_SITE_HEIGHT) {3.92}
set ::env(PLACE_SITE_WIDTH) {0.56}
set ::env(PL_BASIC_PLACEMENT) {0}
set ::env(PL_ESTIMATE_PARASITICS) {1}
set ::env(PL_INIT_COEFF) {0.00002}
set ::env(PL_IO_ITER) {5}
set ::env(PL_LIB) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(PL_MACRO_CHANNEL) {0 0}
set ::env(PL_MACRO_HALO) {100 100}
set ::env(PL_MAX_DISPLACEMENT_X) {2000}
set ::env(PL_MAX_DISPLACEMENT_Y) {2000}
set ::env(PL_OPTIMIZE_MIRRORING) {1}
set ::env(PL_RANDOM_GLB_PLACEMENT) {0}
set ::env(PL_RANDOM_INITIAL_PLACEMENT) {0}
set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) {0}
set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {1}
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {1}
set ::env(PL_RESIZER_HOLD_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) {0.1}
set ::env(PL_RESIZER_MAX_CAP_MARGIN) {20}
set ::env(PL_RESIZER_MAX_SLEW_MARGIN) {20}
set ::env(PL_RESIZER_MAX_WIRE_LENGTH) {0}
set ::env(PL_RESIZER_REPAIR_TIE_FANOUT) {1}
set ::env(PL_RESIZER_SETUP_MAX_BUFFER_PERCENT) {50}
set ::env(PL_RESIZER_SETUP_SLACK_MARGIN) {0.05}
set ::env(PL_RESIZER_TIE_SEPERATION) {0}
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {1}
set ::env(PL_ROUTABILITY_DRIVEN) {1}
set ::env(PL_SKIP_INITIAL_PLACEMENT) {0}
set ::env(PL_TARGET_DENSITY) {0.75}
set ::env(PL_TIME_DRIVEN) {1}
set ::env(PRIMARY_SIGNOFF_TOOL) {magic}
set ::env(PROCESS) {180}
set ::env(PWD) {/home/egor/proj/gf180/gf180_efuse/openlane}
set ::env(QT_ACCESSIBILITY) {1}
set ::env(QT_IM_MODULE) {ibus}
set ::env(QUIT_ON_HOLD_VIOLATIONS) {1}
set ::env(QUIT_ON_ILLEGAL_OVERLAPS) {1}
set ::env(QUIT_ON_LONG_WIRE) {0}
set ::env(QUIT_ON_LVS_ERROR) {1}
set ::env(QUIT_ON_MAGIC_DRC) {1}
set ::env(QUIT_ON_SETUP_VIOLATIONS) {1}
set ::env(QUIT_ON_TIMING_VIOLATIONS) {1}
set ::env(QUIT_ON_TR_DRC) {1}
set ::env(RCX_CC_MODEL) {10}
set ::env(RCX_CONTEXT_DEPTH) {5}
set ::env(RCX_CORNER_COUNT) {1}
set ::env(RCX_COUPLING_THRESHOLD) {0.1}
set ::env(RCX_MAX_RESISTANCE) {50}
set ::env(RCX_MERGE_VIA_WIRE_RES) {1}
set ::env(RCX_RULES) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.nom}
set ::env(RCX_RULES_MAX) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.max}
set ::env(RCX_RULES_MIN) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/rules.openrcx.gf180mcuC.min}
set ::env(RCX_SDC_FILE) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/13-efuse_ctrl.sdc}
set ::env(REPORTS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports}
set ::env(RESULTS_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results}
set ::env(RIGHT_MARGIN_MULT) {12}
set ::env(RIPPLE_CARRY_ADDER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/rca_map.v}
set ::env(ROUTING_CORES) {24}
set ::env(ROUTING_CURRENT_DEF) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/cts/12-efuse_ctrl.resized.def}
set ::env(RSZ_DONT_TOUCH_RX) {\$^}
set ::env(RSZ_LIB) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis/resizer_gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib}
set ::env(RSZ_USE_OLD_REMOVER) {0}
set ::env(RT_MAX_LAYER) {Metal5}
set ::env(RT_MIN_LAYER) {Metal2}
set ::env(RUN_CVC) {1}
set ::env(RUN_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24}
set ::env(RUN_DRT) {1}
set ::env(RUN_FILL_INSERTION) {1}
set ::env(RUN_IRDROP_REPORT) {0}
set ::env(RUN_KLAYOUT) {0}
set ::env(RUN_KLAYOUT_DRC) {0}
set ::env(RUN_KLAYOUT_XOR) {0}
set ::env(RUN_LVS) {1}
set ::env(RUN_MAGIC) {1}
set ::env(RUN_MAGIC_DRC) {1}
set ::env(RUN_SPEF_EXTRACTION) {1}
set ::env(RUN_STANDALONE) {1}
set ::env(RUN_TAG) {RUN_2022.12.03_13.12.24}
set ::env(RUN_TAP_DECAP_INSERTION) {1}
set ::env(SCLPATH) {/home/egor/.volare/gf180mcuC/gf180mcu_fd_sc_mcu7t5v0}
set ::env(SCRIPTS_DIR) {/opt/openeda/OpenLane/scripts}
set ::env(SESSION_MANAGER) {local/duohead:@/tmp/.ICE-unix/1612,unix/duohead:/tmp/.ICE-unix/1612}
set ::env(SHELL) {/usr/bin/fish}
set ::env(SHLVL) {2}
set ::env(SPEF_EXTRACTOR) {openrcx}
set ::env(SSH_AGENT_LAUNCHER) {openssh}
set ::env(SSH_AUTH_SOCK) {/run/user/1000/keyring/ssh}
set ::env(START_TIME) {2022.12.03_13.12.24}
set ::env(STA_PRE_CTS) {0}
set ::env(STA_REPORT_POWER) {1}
set ::env(STA_WRITE_LIB) {1}
set ::env(STD_CELL_GROUND_PINS) {VSS}
set ::env(STD_CELL_LIBRARY) {gf180mcu_fd_sc_mcu7t5v0}
set ::env(STD_CELL_LIBRARY_CDL) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/cdl/gf180mcu_fd_sc_mcu7t5v0.cdl}
set ::env(STD_CELL_LIBRARY_OPT) {gf180mcu_fd_sc_mcu7t5v0}
set ::env(STD_CELL_POWER_PINS) {VDD}
set ::env(SYNTH_ADDER_TYPE) {YOSYS}
set ::env(SYNTH_BIN) {yosys}
set ::env(SYNTH_BUFFERING) {1}
set ::env(SYNTH_CAP_LOAD) {72.91}
set ::env(SYNTH_CLK_DRIVING_CELL) {gf180mcu_fd_sc_mcu7t5v0__inv_4}
set ::env(SYNTH_CLK_DRIVING_CELL_PIN) {ZN}
set ::env(SYNTH_CLOCK_TRANSITION) {0.15}
set ::env(SYNTH_CLOCK_UNCERTAINTY) {0.25}
set ::env(SYNTH_DRIVING_CELL) {gf180mcu_fd_sc_mcu7t5v0__inv_1}
set ::env(SYNTH_DRIVING_CELL_PIN) {ZN}
set ::env(SYNTH_ELABORATE_ONLY) {0}
set ::env(SYNTH_EXTRA_MAPPING_FILE) {}
set ::env(SYNTH_FLAT_TOP) {0}
set ::env(SYNTH_LATCH_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/latch_map.v}
set ::env(SYNTH_MAX_FANOUT) {10}
set ::env(SYNTH_MAX_TRAN) {2.0}
set ::env(SYNTH_MIN_BUF_PORT) {gf180mcu_fd_sc_mcu7t5v0__buf_1 I Z}
set ::env(SYNTH_NO_FLAT) {0}
set ::env(SYNTH_OPT) {0}
set ::env(SYNTH_READ_BLACKBOX_LIB) {0}
set ::env(SYNTH_SCRIPT) {/opt/openeda/OpenLane/scripts/yosys/synth.tcl}
set ::env(SYNTH_SHARE_RESOURCES) {1}
set ::env(SYNTH_SIZING) {0}
set ::env(SYNTH_STRATEGY) {AREA 3}
set ::env(SYNTH_TIEHI_PORT) {gf180mcu_fd_sc_mcu7t5v0__tieh Z}
set ::env(SYNTH_TIELO_PORT) {gf180mcu_fd_sc_mcu7t5v0__tiel ZN}
set ::env(SYNTH_TIMING_DERATE) {0.05}
set ::env(TAKE_LAYOUT_SCROT) {0}
set ::env(TECH_LEF) {/home/egor/.volare/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/techlef/gf180mcu_fd_sc_mcu7t5v0.tlef}
set ::env(TECH_METAL_LAYERS) {Metal1 Metal2 Metal3 Metal4 Metal5}
set ::env(TERM) {xterm-256color}
set ::env(TERMINAL_OUTPUT) {/dev/null}
set ::env(TMP_DIR) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp}
set ::env(TOP_MARGIN_MULT) {4}
set ::env(TRACKS_INFO_FILE) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/tracks.info}
set ::env(TRACKS_INFO_FILE_PROCESSED) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing/config.tracks}
set ::env(TRISTATE_BUFFER_MAP) {/home/egor/.volare/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/tribuff_map.v}
set ::env(USER) {egor}
set ::env(USERNAME) {egor}
set ::env(USE_ARC_ANTENNA_CHECK) {1}
set ::env(USE_GPIO_PADS) {0}
set ::env(VCHECK_OUTPUT) {}
set ::env(VDD_NET) {VDD}
set ::env(VDD_NETS) {VDD}
set ::env(VDD_PIN) {VDD}
set ::env(VERILOG_FILES) {efuse_ctrl_fromvhdl.v ../macros/cells.v}
set ::env(VERILOG_FILES_BLACKBOX) {/home/egor/proj/gf180/gf180_efuse/macros/efuse_array.v}
set ::env(VIRTUAL_ENV) {/opt/openeda/OpenLane/install/venv}
set ::env(VTE_VERSION) {6203}
set ::env(WAYLAND_DISPLAY) {wayland-0}
set ::env(WIRE_RC_LAYER) {Metal2}
set ::env(XAUTHORITY) {/run/user/1000/.mutter-Xwaylandauth.2E58V1}
set ::env(XDG_CURRENT_DESKTOP) {GNOME}
set ::env(XDG_MENU_PREFIX) {gnome-}
set ::env(XDG_RUNTIME_DIR) {/run/user/1000}
set ::env(XDG_SESSION_CLASS) {user}
set ::env(XDG_SESSION_DESKTOP) {gnome}
set ::env(XDG_SESSION_TYPE) {wayland}
set ::env(XMODIFIERS) {@im=ibus}
set ::env(YOSYS_REWRITE_VERILOG) {0}
set ::env(cts_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/cts}
set ::env(cts_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/cts}
set ::env(cts_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/cts}
set ::env(cts_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/cts}
set ::env(eco_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/eco}
set ::env(eco_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/eco}
set ::env(eco_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/eco}
set ::env(eco_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/eco}
set ::env(floorplan_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/floorplan}
set ::env(floorplan_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/floorplan}
set ::env(floorplan_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/floorplan}
set ::env(floorplan_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/floorplan}
set ::env(fp_report_prefix) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/floorplan/3-initial_fp}
set ::env(placement_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/placement}
set ::env(placement_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/placement}
set ::env(placement_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/placement}
set ::env(placement_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/placement}
set ::env(routing_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/routing}
set ::env(routing_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/routing}
set ::env(routing_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/routing}
set ::env(routing_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/routing}
set ::env(signoff_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/signoff}
set ::env(signoff_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/signoff}
set ::env(signoff_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/signoff}
set ::env(signoff_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/signoff}
set ::env(synth_report_prefix) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/synthesis/1-synthesis}
set ::env(synthesis_logs) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/logs/synthesis}
set ::env(synthesis_reports) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/reports/synthesis}
set ::env(synthesis_results) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/results/synthesis}
set ::env(synthesis_tmpfiles) {/home/egor/proj/gf180/gf180_efuse/openlane/runs/RUN_2022.12.03_13.12.24/tmp/synthesis}
set ::env(timer_end) {1670053395}
set ::env(timer_routed) {1670053198}
set ::env(timer_start) {1670051544}