Merge branch 'efabless-caravel' into main Bringing in changes from gfmpw-0c -> gfmwp-0d
diff --git a/README.md b/README.md index d2efa54..faf2d7f 100644 --- a/README.md +++ b/README.md
@@ -1,10 +1,24 @@ -# Caravel User Project +# ChipFlow GFMPW template -[](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml) +[](https://opensource.org/licenses/Apache-2.0) -| :exclamation: Important Note | -|-----------------------------------------| +This is template repository used as the base for GFMPW tapeout for ChipFlow projects. +It contains reduced setup based on the `gf180mcu` branch in the [caravel_user_project repo](https://github.com/efabless/caravel_user_project). +The commit is squashed to save disk space and download bandwidth. -## Please fill in your project documentation in this README.md file +The use of this template is mainly to allow to easily make a repo that can be used to commit +a design for tape-out on the efabless platform. Repo that are based on this template should +put the user_project_wrapper.gds(.gz) to tape out in the gds directory and replace this +README with a proper reference to the repo and code that is used to generate this gds file. -Refer to [README](docs/source/index.rst) for this sample project documentation. +The branch `efabless-caravel` branch is used to track the upstream repo. Updating to new version +is done by manually adding squashed changes in the upstream `gf180mcu` to the commit version +mentioned in the last commit on the `efabless-caravel` branch. In the new commit message on the +`efabless-caravel` branch the new commit version of the upstream repo should be mentioned so +a new update can done in the future. Only squashed changes are added in this branch to avoid +brining in the whole (convoluted) history of the upstream branch. + +After an update to the `efabless-caravel` project it needs to be merged into the `main` branch. +This most likely will involve fixing merge conflicts; each merge conflict will need to be +what changes need to be done to `main` branch to reflect the changes in the `efabless-caravel` +branch.
diff --git a/verilog/rtl/user_defines.v b/verilog/rtl/user_defines.v index d16d493..91dad5d 100644 --- a/verilog/rtl/user_defines.v +++ b/verilog/rtl/user_defines.v
@@ -50,41 +50,41 @@ // up in a state that can be used immediately without depending on // the management SoC to run a startup program to configure the GPIOs. -`define USER_CONFIG_GPIO_5_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_6_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_7_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_8_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_9_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_10_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_11_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_12_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_13_INIT `GPIO_MODE_INVALID +`define USER_CONFIG_GPIO_5_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_6_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_7_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_8_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_9_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_10_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_11_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_12_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_13_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL // Configurations of GPIO 14 to 24 are used on caravel but not caravan. -`define USER_CONFIG_GPIO_14_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_15_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_16_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_17_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_18_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_19_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_20_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_21_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_22_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_23_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_24_INIT `GPIO_MODE_INVALID +`define USER_CONFIG_GPIO_14_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_15_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_16_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_17_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_18_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_19_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_20_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_21_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_22_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_23_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_24_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL -`define USER_CONFIG_GPIO_25_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_26_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_27_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_28_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_29_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_30_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_31_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_32_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_33_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_34_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_35_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_INVALID -`define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_INVALID +`define USER_CONFIG_GPIO_25_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_26_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_27_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_28_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_29_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_30_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_31_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_32_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_33_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_34_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_35_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL +`define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_USER_STD_BIDIRECTIONAL `endif // __USER_DEFINES_H