commit | b377e6dc0cd8db53c307da9791a2316c0613eb69 | [log] [tgz] |
---|---|---|
author | Tholin <cutie@tholin.dev> | Mon Dec 05 21:53:57 2022 +0100 |
committer | Tholin <cutie@tholin.dev> | Mon Dec 05 21:53:57 2022 +0100 |
tree | ebfb29b7f52f384fcc459ce2d74c4cf5f072f6a8 | |
parent | d58f0f5d3cc46e715d3c69e86f52509df2da219b [diff] |
Update README.
This is a partial implementation of the abandoned Signetics 2650 CPU architecture from 1975.
Only a subset of the full feature set is implemented here. The following features are part of the S2650, but missing from the SA2650:
dar
) instructionswrte
, rede
) instructionsPlease see this repository for Documentation on the CPU architecture, as well as an assembler, emulator and example programs.