| commit | 3bc9bda3363f6d46ce1e3f18f828a6d5a3c806ea | [log] [tgz] |
|---|---|---|
| author | Tholin <cutie@tholin.dev> | Wed Dec 07 00:52:41 2022 +0100 |
| committer | Tholin <cutie@tholin.dev> | Wed Dec 07 00:52:41 2022 +0100 |
| tree | 3b5cad03ed88f626bee7c34e14523a102315a069 | |
| parent | f0c39612b6655908df4cb59a0c592cbc4e8ffdd4 [diff] |
Update workflow file (3).
This is a partial implementation of the abandoned Signetics 2650 CPU architecture from 1975.
Only a subset of the full feature set is implemented here. The following features are part of the S2650, but missing from the SA2650:
dar) instructionswrte, rede) instructionsPlease see this repository for Documentation on the CPU architecture, as well as an assembler, emulator and example programs.