| commit | 1f2b7ec05fdbdcc5304005045b2610583f59dc29 | [log] [tgz] |
|---|---|---|
| author | Luca Horn <l.horn@geiger-edelmetalle.de> | Wed Dec 07 17:59:47 2022 +0100 |
| committer | Luca Horn <l.horn@geiger-edelmetalle.de> | Wed Dec 07 17:59:47 2022 +0100 |
| tree | beac9aaa531a3efa9885b27945c0a37f622fe112 | |
| parent | 1eccf622c266885af0cc10b613fee2fe5a8995e0 [diff] |
Remove unneeded files.
This is a partial implementation of the abandoned Signetics 2650 CPU architecture from 1975.
Only a subset of the full feature set is implemented here. The following features are part of the S2650, but missing from the SA2650:
dar) instructionswrte, rede) instructionsPlease see this repository for Documentation on the CPU architecture, as well as an assembler, emulator and example programs.