blob: e710fc58896af440ff9b26583c0605e2f635bb95 [file] [log] [blame]
Project Chip ID is: 402698798
Setting Project Chip ID to: 1800b22e
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!