Update info.yaml
diff --git a/info.yaml b/info.yaml
index 65e82e8..9f4e10b 100644
--- a/info.yaml
+++ b/info.yaml
@@ -1,10 +1,10 @@
---
# TinyTapeout project information
project:
- wokwi_id: 334445762078310996 # If using wokwi, set this to your project's ID
-# source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here
-# - verilog/rtl/counter.v
-# - verilog/rtl/decoder.v
+ wokwi_id: 341620484740219475 # If using wokwi, set this to your project's ID
+# source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here. Source files must be in ./src
+# - counter.v
+# - decoder.v
# top_module: "seven_segment_seconds" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
@@ -14,33 +14,32 @@
#
# This info will be automatically collected and used to make a datasheet for the chip.
documentation:
- author: "" # Your name
- discord: "" # Your discord handle - make sure to include the # part as well
- title: "" # Project title
- description: "" # Short description of what your project does
- how_it_works: "" # Longer description of how the project works
- how_to_test: "" # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
- external_hw: "" # Describe any external hardware needed
+ author: "Thorsten Knoll" # Your name
+ discord: "" # Your discord handle
+ title: "8x8 Bit Pattern Player" # Project title
+ description: "8x8 bit serial programmable, addressable and playable memory." # Short description of what your project does
+ how_it_works: "The 8x8 memory is a 64-bit shiftregister, consisting of 64 serial chained D-FlipFlops (data: IN0, clk_sr: IN1). 8 memoryslots of each 8 bit can be directly addressed via addresslines (3 bit: IN2, IN3, IN4) or from a clockdriven player (3 bit counter, clk_pl: IN7). A mode selector line (mode: IN5) sets the operation mode to addressing or to player. The 8 outputs are driven by the 8 bit of the addressed memoryslot." # Longer description of how the project works
+ how_to_test: "Programm the memory: Start by filling the 64 bit shiftregister via data and clk_sr, each rising edge on clk_sr shifts a new data bit into the register. Select mode: Set mode input for direct addressing or clockdriven player. Address mode: Address a memoryslot via the three addresslines and watch the memoryslot at the outputs. Player mode: Each rising edge at clk_pl enables the next memoryslot to the outputs." # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
+ external_hw: "You could programm, address and play the 8x8 Bit Pattern Player with a breadboard, two clock buttons and some dipswitches on the input side. Add some LED to the output side. Just like the WOKWI simulation." # Describe any external hardware needed
language: "wokwi" # other examples include Verilog, Amaranth, VHDL, etc
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
- clock_hz: 0 # Clock frequency in Hz (if required) we are expecting max clock frequency to be ~6khz. Provided on input 0.
+ clock_hz: 0 # Clock frequency in Hz (if required)
picture: "" # relative path to a picture in your repository
- inputs: # a description of what the inputs do
- - clock
- - reset
+ inputs:
+ - data
+ - clk_sr
+ - address_0
+ - address_1
+ - address_2
+ - mode
- none
- - none
- - none
- - none
- - none
- - none
+ - clk_pl
outputs:
- - segment a # a description of what the outputs do
- - segment b
- - segment c
- - segment d
- - segment e
- - segment f
- - segment g
- - none
-
+ - bit 0
+ - bit 1
+ - bit 2
+ - bit 3
+ - bit 4
+ - bit 5
+ - bit 6
+ - bit 7
