commit 5b4b6de0370a8a5da62cb86f7dde64c6104c6c4b
author Cocogoat <70917894+AyaseErii@users.noreply.github.com> Sat Dec 03 17:35:16 2022 -0500
committer GitHub <noreply@github.com> Sat Dec 03 17:35:16 2022 -0500
tree ff01514c2ab13f3c086acd4d85534d4e30b0991e
parent ed03034ad5a028173df85d615ed4a18a6c720af3

Update README.md

README.md

diff --git a/README.md b/README.md
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@@ -23,6 +23,9 @@
 
 The command above will generate the digital counter design (gdsii) and all necessary files for the next step---wrapper the design in to `user_project_wrapper`.
 
+Sample result:
+![image](https://user-images.githubusercontent.com/70917894/205464861-30865a91-fe15-4bbe-85c4-f465b9a114cc.png)
+
 ### Step 2: Harden the Five Counters in the Wrapper
 
 Before running the flow of `user_project_wrapper`, please make sure you changed the [user_project_wrapper.v](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/verilog/rtl/user_project_wrapper.v), [config.tcl](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/openlane/user_project_wrapper/config.tcl) for the `user_project_wrapper` design, and [macro.cfg](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/openlane/user_project_wrapper/macro.cfg) for macro placement.
@@ -34,6 +37,10 @@
 
 After the flow compeleted, you can repeat the Step 2 iteratively until you get a satisfied design.
 
+Sample result:
+![image](https://user-images.githubusercontent.com/70917894/205464876-15474901-706c-4385-9581-77a05267b07f.png)
+
+
 ## Contributors
 Jun (Jerry) Yin, Ceylan M. Morgul, Rahul Sreekumar, Xuanjia (Eric) Bi, and Mircea R. Stan.