Sign in
foss-eda-tools
/
third_party
/
shuttle
/
gf180mcu
/
mpw-000
/
slot-019
/
fd66bbedb092b54f6889a4089f2ceedd107dac09
commit
fd66bbedb092b54f6889a4089f2ceedd107dac09
[
log
]
author
Tamas Hubai <efabless@htamas.net>
Sun Dec 04 02:19:33 2022 +0100
committer
Tamas Hubai <efabless@htamas.net>
Sun Dec 04 02:19:33 2022 +0100
tree
dfba11985a735ecfc78652dbf3442901597d2df3
parent
78bb4613766e8c843e7b2a00b903378b6d840829
[
diff
]
Rename user_proj_example
openlane/unigate/config.tcl
[Renamed from openlane/user_proj_example/config.tcl -
diff
]
openlane/unigate/pin_order.cfg
[Renamed from openlane/user_proj_example/pin_order.cfg -
diff
]
openlane/user_project_wrapper/config.tcl
[
diff
]
verilog/rtl/unigate.v
[Renamed from verilog/rtl/user_proj_example.v -
diff
]
verilog/rtl/uprj_netlists.v
[
diff
]
verilog/rtl/user_project_wrapper.v
[
diff
]
6 files changed
tree: dfba11985a735ecfc78652dbf3442901597d2df3
.github/
docs/
openlane/
verilog/
.gitignore
LICENSE
Makefile
README.md
README.md
Caravel User Project
:exclamation: Important Note
Please fill in your project documentation in this README.md file
Refer to
README
for this sample project documentation.