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Simulated Dflop mem for ram macros. Macro ram to be included in near future\n" }, { "commit": "52b43df305d38ae16c989835a0c3e70e9150dd84", "tree": "940faa73b8239d6b8d5f281e81195b345a9a790c", "parents": [ "2b606769b879b10e0e79ba7731f23be6a782f346" ], "author": { "name": "Ryan Price", "email": "91754608+RyanMPrice@users.noreply.github.com", "time": "Tue Nov 15 16:43:24 2022 -0700" }, "committer": { "name": "Ryan Price", "email": "91754608+RyanMPrice@users.noreply.github.com", "time": "Tue Nov 15 16:43:24 2022 -0700" }, "message": "Update user_proj_example.v\n\nAdding in the counter so we can verify Caravel is working correctly.\n" }, { "commit": "2b606769b879b10e0e79ba7731f23be6a782f346", "tree": "0cda53e6c5fccbc3da9fe40bf1fc98ad969a5feb", "parents": [ "ece8c6a2f6a60151635fb9023e3446f465627741" ], "author": { "name": "Ryan Price", "email": "91754608+RyanMPrice@users.noreply.github.com", "time": "Tue Nov 15 16:02:42 2022 -0700" }, "committer": { "name": "Ryan Price", "email": "91754608+RyanMPrice@users.noreply.github.com", "time": "Tue Nov 15 16:02:42 2022 -0700" }, "message": "Base Design Import\n\nBase design passed from internal simulation. Now to see how the tools handle things!\n" }, { "commit": "ece8c6a2f6a60151635fb9023e3446f465627741", "tree": "a524f6d362ee78b201f4916442b35fd613f4185f", "parents": [], "author": { "name": "Ryan Price", "email": "91754608+RyanMPrice@users.noreply.github.com", "time": "Tue Nov 15 15:52:17 2022 -0700" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Nov 15 15:52:17 2022 -0700" }, "message": "Initial commit" } ] }