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  1. .github/
  2. def/
  3. docs/
  4. gds/
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  6. lib/
  7. mag/
  8. maglef/
  9. mpw_precheck/
  10. openlane/
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  14. spef/
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  17. verilog/
  18. .gitignore
  20. Makefile
  21. README.md

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

Refer to README for a quickstart of how to use caravel_user_project Refer to README for this sample project documentation.

:exclamation: Important MAKE!

This design uses design rules for the gf180mcuC PDK.

This project implements a 16 bit RISC themed processor for educational purposes. --would if the PDK were complete --Since the number of IO pins are limited the Address/Databus are merged into a single external bus.

This project provides experimental digital blocks to explore and learn about the idea-to-silicon pipeline.

Blocks included clkgate simple latch and a bit of logic to safely control a clock signal with logic clkmux2 simple switch that allows two clock signals to be switched between without glitching DIGOTA these are purely experimental WavePWm waveform synthesis from wavetable rom memory

More documentation to come in the following days!