)]}'
{
  "commit": "1cece734f3086f38d1c8f5c21164eb5aaa971bf8",
  "tree": "65e01257250b59d5b19e401ea7075bbf3dd0e547",
  "parents": [
    "9365650fe40c363ed166ab4d7e01f4ea6095de9e"
  ],
  "author": {
    "name": "Johan Euphrosine",
    "email": "proppy@google.com",
    "time": "Fri Nov 11 03:54:57 2022 +0900"
  },
  "committer": {
    "name": "Johan Euphrosine",
    "email": "proppy@google.com",
    "time": "Sat Nov 19 03:36:48 2022 +0900"
  },
  "message": "verilog: fix module name",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e88356062bc1417eb525e6cea79a827650427373",
      "old_mode": 33188,
      "old_path": "verilog/rtl/tiny_user_project.v",
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      "new_mode": 33188,
      "new_path": "verilog/rtl/tiny_user_project.v"
    },
    {
      "type": "modify",
      "old_id": "9fdd268658a4709625894904ee9548d71a744048",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "e0abba807f80bb544ef93df09cab7e83773ed009",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
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}
