diff --git a/openlane/user_project_wrapper/config.json b/openlane/user_project_wrapper/config.json
index 3379f46..d0e9cfc 100644
--- a/openlane/user_project_wrapper/config.json
+++ b/openlane/user_project_wrapper/config.json
@@ -1,6 +1,6 @@
 {
     "DESIGN_NAME": "user_project_wrapper",
-    "VERILOG_FILES": ["dir::project_root/verilog/rtl/defines.v", "dir::project_root/verilog/rtl/user_project_wrapper.v"],
+    "VERILOG_FILES": ["dir::../../verilog/rtl/defines.v", "dir::../../verilog/rtl/user_project_wrapper.v"],
     "CLOCK_PERIOD": 10,
     "CLOCK_PORT": "user_clock2",
     "CLOCK_NET": "mprj.clk",