)]}'
{
  "id": "dbab0667386cc0dbf9be056abb7d9a445136f57f",
  "entries": [
    {
      "mode": 33188,
      "type": "blob",
      "id": "44a29a02e510eda6a9b95a4b9255eef403b5f05a",
      "name": "defines.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "158dbad6682e64018843cd35ac01dc4c18086522",
      "name": "eFPGA_top.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "1113ae85746c010df8e0eec889072bce915e7432",
      "name": "fabric.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "7dae755f37fc8119dcc1dca5aa623d4a75f2c42b",
      "name": "models_pack.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "3537de803dd1d472e447f0791344cbf5c9391455",
      "name": "uprj_netlists.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "91dad5d383987e936f8b9505656974faadd311d2",
      "name": "user_defines.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "78cd8848bfcec60d8966e0b095c7d87ca9d6946f",
      "name": "user_proj_example.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "146877d825df95354c9fee538a9a0c50d6fc3a26",
      "name": "user_project_wrapper.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "2d3c5bf264165740b234117bdab95088c9578b42",
      "name": "wrapper_gf180.v"
    }
  ]
}