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foss-eda-tools
/
third_party
/
shuttle
/
gf180mcu
/
mpw-000
/
slot-007
/
16e21890a5d1f4b04847dd91ed4b82aa8708d183
commit
16e21890a5d1f4b04847dd91ed4b82aa8708d183
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log
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[
tgz
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author
Matt Venn <matt@mattvenn.net>
Wed Nov 23 13:27:28 2022 +0100
committer
Matt Venn <matt@mattvenn.net>
Wed Nov 23 13:27:28 2022 +0100
tree
244e7a7df1c7dcd7efdbd5b606357d9ce0be8f27
parent
0bce573edc79af7e94361951e30f86efac4e583f
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get ready for submission
.gitmodules
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README.md
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def/user_project_wrapper.def
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def/wrapped_vga_clock.def
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gds/user_proj_example.gds
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gds/user_project_wrapper.gds
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gds/wrapped_vga_clock.gds
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lef/user_project_wrapper.lef
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lib/user_project_wrapper.lib
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mag/user_proj_example.mag
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mag/user_project_wrapper.mag
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maglef/user_proj_example.mag
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maglef/user_project_wrapper.mag
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openlane/user_project_wrapper/config.tcl
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openlane/user_project_wrapper/macro.cfg
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openlane/wrapped_vga_clock/config.tcl
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sdc/user_proj_example.sdc
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sdc/user_project_wrapper.sdc
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sdf/multicorner/nom/user_project_wrapper.ff.sdf
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sdf/multicorner/nom/user_project_wrapper.ss.sdf
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sdf/multicorner/nom/user_project_wrapper.tt.sdf
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sdf/user_proj_example.sdf
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sdf/user_project_wrapper.sdf
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signoff/user_proj_example/metrics.csv
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signoff/user_project_wrapper/metrics.csv
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spef/multicorner/user_project_wrapper.nom.spef
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spef/user_project_wrapper.spef
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spi/lvs/user_project_wrapper.spice
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verilog/gl/user_project_wrapper.v
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verilog/gl/wrapped_vga_clock.v
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verilog/includes/includes.rtl.caravel_user_project
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verilog/rtl/user_defines.v
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verilog/rtl/user_project_wrapper.v
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verilog/rtl/vga-clock
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verilog/rtl/wrapped_vga_clock.v
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35 files changed
tree: 244e7a7df1c7dcd7efdbd5b606357d9ce0be8f27
.github/
def/
docs/
gds/
lef/
lib/
mag/
maglef/
openlane/
sdc/
sdf/
signoff/
spef/
spi/
verilog/
.gitignore
.gitmodules
LICENSE
Makefile
README.md
README.md
GF180 Demo
Uses VGA clock demo from
https://github.com/mattvenn/vga-clock
