commit: 88d6ff2375ae5ddc80575cf3d491bd6342fab8cf
[log]
author: Matt Venn <matt@mattvenn.net>
Fri Dec 02 13:11:19 2022 +0100
committer: Matt Venn <matt@mattvenn.net>
Fri Dec 02 13:11:19 2022 +0100
tree: 168921333dab7d76781db650bab0bfc2d7c8a020
parent: 61203772a69ed3e69cc0e43e330ef352f89a5ad7 [diff]

update user defines to latest version

verilog/rtl/user_defines.v[diff]

1 file changed

tree: 168921333dab7d76781db650bab0bfc2d7c8a020

README.md

VGA Clock for GF180

VGA clock info: https://www.zerotoasiccourse.com/post/vga_clock/
VGA clock RTL: https://github.com/mattvenn/vga-clock
PCB https://github.com/mattvenn/vga_clock_pcb