blob: efd3556ec300eef11cf024faa28b5e26c3ff2119 [file] [log] [blame]
Step 1: Create new cells for new GPIO default vectors.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_009.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_009.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_009.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_009.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_007.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_007.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_087.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_087.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_007.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_007.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_046.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_046.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_046.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_046.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_046.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_046.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00a.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00a.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/mag/gpio_defaults_block_00b.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u463_russellf/gf180_russell/verilog/gl/gpio_defaults_block_00b.v already exists and does not need to be generated.
Step 2: Modify top-level layouts to use the specified defaults.
Done.