tree a4482835c4fa5e2ad0b042fe06e8858bb03693d6
parent 68fc4e6fb573712eb90d4eed46b3dd5261865aa4
author Tim Edwards <tim@opencircuitdesign.com> 1623683589 -0400
committer Tim Edwards <tim@opencircuitdesign.com> 1623683589 -0400

Corrected pin connections in the verilog for sky130_ef_io (pins for
two cells incorrectly labeled while splitting the pad and core pins
on the power pads).