tree 5c9cb93e93743eb2380dc0bd0148ce0ca7eadb76
parent ca2b9a9e590982eeaacc061c29cfed8ca81805df
author Tim Edwards <tim@opencircuitdesign.com> 1614368151 -0500
committer Tim Edwards <tim@opencircuitdesign.com> 1614368151 -0500

Added the sky130_sram_macros library from the github/efabless
repository.  These are used in the Caravel chip, but there is no
place where the underlying cells are made available in the PDK,
making it impossible to run LVS, DRC, or do simulation at anything
other than a black-box level of the whole SRAM block.