)]}'
{
  "commit": "cfe970cf064ecd490117858b3eef726b610bc161",
  "tree": "5c9cb93e93743eb2380dc0bd0148ce0ca7eadb76",
  "parents": [
    "ca2b9a9e590982eeaacc061c29cfed8ca81805df"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Fri Feb 26 14:35:51 2021 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Fri Feb 26 14:35:51 2021 -0500"
  },
  "message": "Added the sky130_sram_macros library from the github/efabless\nrepository.  These are used in the Caravel chip, but there is no\nplace where the underlying cells are made available in the PDK,\nmaking it impossible to run LVS, DRC, or do simulation at anything\nother than a black-box level of the whole SRAM block.\n",
  "tree_diff": [
    {
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      "new_mode": 33261,
      "new_path": "scripts/configure"
    },
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      "old_mode": 33261,
      "old_path": "scripts/configure.ac",
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      "new_path": "scripts/configure.ac"
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      "old_id": "11eb22c18885fb83f759ad30b1e15afa47b0b057",
      "old_mode": 33188,
      "old_path": "sky130/Makefile.in",
      "new_id": "edee408fdf3f7dc5ad0051573689895be8915e5c",
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      "new_path": "sky130/Makefile.in"
    },
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      "old_path": "sky130/magic/sky130.magicrc",
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      "new_path": "sky130/magic/sky130.magicrc"
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}