Corrected sort_pdkfiles.py path
diff --git a/sky130/Makefile.in b/sky130/Makefile.in index 81fcd3e..c37b8d1 100644 --- a/sky130/Makefile.in +++ b/sky130/Makefile.in
@@ -922,19 +922,19 @@ # Install SkyWater I/O pad library ${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \ -cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -lef %l/latest/cells/*/*.lef annotate compile-only \ exclude=*.magic.lef,sky130_ef_io.lef \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -doc %l/latest/cells/*/*.pdf \ -lib %l/latest/timing/*.lib \ -gds %l/latest/cells/*/*.gds compile-only \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ options=custom/scripts/sky130_fd_io_import.tcl \ -verilog %l/latest/cells/*/*.*.v \ -verilog %l/latest/cells/*/*.v exclude=*.*.v \ compile-only filter=custom/scripts/inc_verilog.py \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -library general sky130_fd_io 2>&1 | tee -a ${SKY130A}_make.log # Remove the base verilog files which have already been included into # the libraries @@ -955,24 +955,24 @@ ${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \ -techlef %l/latest/tech/*.tlef \ -spice %l/latest/cells/*/*.spice compile-only \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ filter=custom/scripts/fix_device_models.py \ -cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -lef %l/latest/cells/*/*.magic.lef compile-only \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -doc %l/latest/cells/*/*.pdf \ -lib %l/latest/timing/*.lib \ -gds %l/latest/cells/*/*.gds compile-only \ options=custom/scripts/gds_import_setup.tcl \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \ rename=primitives filter=custom/scripts/inc_verilog.py \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -verilog %l/latest/cells/*/*.*.v \ -verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \ compile-only filter=custom/scripts/inc_verilog.py \ - sort=custom/scripts/sort_pdkfiles.py \ + sort=../common/sort_pdkfiles.py \ -library digital sky130_fd_sc_hd \ -library digital sky130_fd_sc_hdll \ -library digital sky130_fd_sc_hvl \