)]}'
{
  "commit": "ca2b9a9e590982eeaacc061c29cfed8ca81805df",
  "tree": "437fb52ce2b8eabb9a704c112e8174f4b8df35b4",
  "parents": [
    "8830dfe4c08093d0b0c5cd639c414e4d67112c2c"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Thu Feb 25 21:12:08 2021 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Thu Feb 25 21:12:08 2021 -0500"
  },
  "message": "Corrected two errors in handling SRAM core cell devices:  (1) the\nnpass devices were getting eliminated, and (2) the smaller parasitic\nppu devices were getting eliminated.  The first one was unintentional\nand due to copying a set of operators to the wrong place;  the\nsecond one was probably intentional, but the smaller parasitic\ndevices do have a characterized model and should be extracted.\nHowever, one of the parasitic devices in the dual port SRAM layout\ndoes not match any valid characterized device model bins, and the\nmodel bins may need to be extended.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "dc07d136bc9a209703a2e0d18f6bf04cbbac93f5",
      "old_mode": 33188,
      "old_path": "sky130/magic/sky130.tech",
      "new_id": "415a40ee20679350f0aea75f0e514d07d596fd26",
      "new_mode": 33188,
      "new_path": "sky130/magic/sky130.tech"
    }
  ]
}