tree 40abdc8a341932af273d7886cc8792a45dc6acca
parent b0b0675731452cc07a65d8fc5aadf441f08794dd
author Tim Edwards <tim@opencircuitdesign.com> 1611328780 -0500
committer Tim Edwards <tim@opencircuitdesign.com> 1611328780 -0500

Added verilog file for the "fake diode" cell used by openlane in sky130_fd_sc_hd.