Added verilog file for the "fake diode" cell used by openlane in sky130_fd_sc_hd.
diff --git a/sky130/Makefile.in b/sky130/Makefile.in
index 321a98d..d8fe84b 100644
--- a/sky130/Makefile.in
+++ b/sky130/Makefile.in
@@ -499,6 +499,7 @@
${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
-gds %l/gds/*.gds \
-lef %l/lef/*.lef \
+ -verilog %l/verilog/*.v \
-library digital sky130_fd_sc_hd |& tee -a ${SKY130A}_install.log
# Add a maskhint set for the GPIO pad .mag view to prevent problems writing
# when writing HVI to GDS during hierarchical adjustments.
