tree e86975dab3493b7ae0cf94321a211b462e45f361
parent 2d613608000cf53072f57c720f391f7c2db69bd0
author Tim Edwards <tim@opencircuitdesign.com> 1602103881 -0400
committer Tim Edwards <tim@opencircuitdesign.com> 1602103881 -0400

Modified the cifinput section of the magic techfile to always draw
pwell under p-tap (TAP AND-NOT NWELL).  This serves to ensure that
abstract views made with "lef write -toplayer" have the pwell
masterslice layer to ensure the correct connectivity between the
power and ground rails and the well and substrate, respectively.