diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fakediode_2.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fakediode_2.gds
index ff35a72..f6f7dc0 100644
--- a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fakediode_2.gds
+++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fakediode_2.gds
Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fakediode_2.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fakediode_2.lef
index 7e9d666..1f34d54 100644
--- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fakediode_2.lef
+++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fakediode_2.lef
@@ -2,55 +2,64 @@
   NOWIREEXTENSIONATPIN ON ;
   DIVIDERCHAR "/" ;
   BUSBITCHARS "[]" ;
-MACRO sky130_ef_sc_hd__fakediode_2
+MACRO sky130_fd_sc_hd__fakediode_2
   CLASS CORE SPACER ;
-  FOREIGN sky130_ef_sc_hd__fakediode_2 ;
-  ORIGIN 0.000 0.000 ;
-  SIZE 0.920 BY 2.720 ;
+  FOREIGN sky130_fd_sc_hd__fakediode_2 ;
+  ORIGIN  0.000000  0.000000 ;
+  SIZE  0.920000 BY  2.720000 ;
   SYMMETRY X Y R90 ;
   SITE unithd ;
   PIN DIODE
+    DIRECTION INPUT ;
+    USE SIGNAL ;
     PORT
       LAYER li1 ;
-        RECT 0.085 0.255 0.835 2.465 ;
+        RECT 0.085000 0.255000 0.835000 2.465000 ;
     END
   END DIODE
   PIN VGND
+    DIRECTION INOUT ;
+    SHAPE ABUTMENT ;
     USE GROUND ;
     PORT
-      LAYER li1 ;
-        RECT 0.000 -0.085 0.920 0.085 ;
-      LAYER mcon ;
-        RECT 0.145 -0.085 0.315 0.085 ;
-        RECT 0.605 -0.085 0.775 0.085 ;
       LAYER met1 ;
-        RECT 0.000 -0.240 0.920 0.240 ;
+        RECT 0.000000 -0.240000 0.920000 0.240000 ;
     END
   END VGND
-  PIN VPWR
-    USE POWER ;
-    PORT
-      LAYER li1 ;
-        RECT 0.000 2.635 0.920 2.805 ;
-      LAYER mcon ;
-        RECT 0.145 2.635 0.315 2.805 ;
-        RECT 0.605 2.635 0.775 2.805 ;
-      LAYER met1 ;
-        RECT 0.000 2.480 0.920 2.960 ;
-    END
-  END VPWR
-  PIN VPB
-    PORT
-      LAYER nwell ;
-        RECT -0.190 1.305 1.110 2.910 ;
-    END
-  END VPB
   PIN VNB
+    DIRECTION INOUT ;
+    USE GROUND ;
     PORT
       LAYER pwell ;
-        RECT 0.145 -0.085 0.315 0.085 ;
+        RECT 0.145000 -0.085000 0.315000 0.085000 ;
     END
   END VNB
-END sky130_ef_sc_hd__fakediode_2
+  PIN VPB
+    DIRECTION INOUT ;
+    USE POWER ;
+    PORT
+      LAYER nwell ;
+        RECT -0.190000 1.305000 1.110000 2.910000 ;
+    END
+  END VPB
+  PIN VPWR
+    DIRECTION INOUT ;
+    SHAPE ABUTMENT ;
+    USE POWER ;
+    PORT
+      LAYER met1 ;
+        RECT 0.000000 2.480000 0.920000 2.960000 ;
+    END
+  END VPWR
+  OBS
+    LAYER li1 ;
+      RECT 0.000000 -0.085000 0.920000 0.085000 ;
+      RECT 0.000000  2.635000 0.920000 2.805000 ;
+    LAYER mcon ;
+      RECT 0.145000 -0.085000 0.315000 0.085000 ;
+      RECT 0.145000  2.635000 0.315000 2.805000 ;
+      RECT 0.605000 -0.085000 0.775000 0.085000 ;
+      RECT 0.605000  2.635000 0.775000 2.805000 ;
+  END
+END sky130_fd_sc_hd__fakediode_2
 END LIBRARY
-
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__diode_2.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fakediode_2.v
similarity index 100%
rename from sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__diode_2.v
rename to sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fakediode_2.v