Updated the custom additions to sky130_fd_sc_hd with a size-2 fill and decap cells with graded amounts of poly which can be used to hit a specific overall target poly density.
diff --git a/VERSION b/VERSION index 0236e72..57f7ead 100644 --- a/VERSION +++ b/VERSION
@@ -1 +1 @@ -1.0.504 +1.0.505
diff --git a/sky130/custom/sky130_fd_sc_hd/Readme.txt b/sky130/custom/sky130_fd_sc_hd/Readme.txt index c794b92..fffbdf8 100644 --- a/sky130/custom/sky130_fd_sc_hd/Readme.txt +++ b/sky130/custom/sky130_fd_sc_hd/Readme.txt
@@ -3,3 +3,5 @@ The fill cells were redesigned to add tap diffusion in the middle because otherwise the spacing of the nwells and the height of the cells prevents FOM fill, resulting in a different density error. Cell "newfill_12" was added to satisfy the change in the poly density rule to 38%; this cell is effectively the decap_12 cell with the poly removed, rendering it a fill cell. Its use is to replace some percentage of decap_12 cells until the maximum poly density rule is satisfied. + +12/10/2024: Cell "newfill_12" was removed and replace with (a modified version of) "fill_12", which serves the same purpose but avoids the error in "newfill_12" where the nwell did not extend to the edge and would cause nwell spacing violations. Because SkyWater imposed stricter limits on poly density, cells "decap_20_12", "decap_40_12", "decap_60_12", and "decap_80_12" have been added to allow selection of poly densities in the decap (relative to the original cell) to meet an overall target poly density in a design.
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_20_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_20_12.gds new file mode 100644 index 0000000..1f8fa11 --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_20_12.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_40_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_40_12.gds new file mode 100644 index 0000000..0c40c6a --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_40_12.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_60_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_60_12.gds new file mode 100644 index 0000000..1c95028 --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_60_12.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_80_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_80_12.gds new file mode 100644 index 0000000..70637ed --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__decap_80_12.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_12.gds index cba0fa2..512f7bd 100644 --- a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_12.gds +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_12.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_2.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_2.gds new file mode 100644 index 0000000..acd8040 --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__fill_2.gds Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__newfill_12.gds b/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__newfill_12.gds deleted file mode 100644 index afafbee..0000000 --- a/sky130/custom/sky130_fd_sc_hd/gds/sky130_ef_sc_hd__newfill_12.gds +++ /dev/null Binary files differ
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_20_12.lef similarity index 94% copy from sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef copy to sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_20_12.lef index e291180..2092dc3 100644 --- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef +++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_20_12.lef
@@ -2,9 +2,9 @@ NOWIREEXTENSIONATPIN ON ; DIVIDERCHAR "/" ; BUSBITCHARS "[]" ; -MACRO sky130_ef_sc_hd__newfill_12 +MACRO sky130_ef_sc_hd__decap_20_12 CLASS CORE SPACER ; - FOREIGN sky130_ef_sc_hd__newfill_12 ; + FOREIGN sky130_ef_sc_hd__decap_20_12 ; ORIGIN 0.000 0.000 ; SIZE 5.520 BY 2.720 ; SYMMETRY X Y R90 ; @@ -74,6 +74,6 @@ RECT 4.745 -0.085 4.915 0.085 ; RECT 5.205 -0.085 5.375 0.085 ; END -END sky130_ef_sc_hd__newfill_12 +END sky130_ef_sc_hd__decap_20_12 END LIBRARY
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_40_12.lef similarity index 94% rename from sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef rename to sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_40_12.lef index e291180..0617491 100644 --- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef +++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_40_12.lef
@@ -2,9 +2,9 @@ NOWIREEXTENSIONATPIN ON ; DIVIDERCHAR "/" ; BUSBITCHARS "[]" ; -MACRO sky130_ef_sc_hd__newfill_12 +MACRO sky130_ef_sc_hd__decap_40_12 CLASS CORE SPACER ; - FOREIGN sky130_ef_sc_hd__newfill_12 ; + FOREIGN sky130_ef_sc_hd__decap_40_12 ; ORIGIN 0.000 0.000 ; SIZE 5.520 BY 2.720 ; SYMMETRY X Y R90 ; @@ -74,6 +74,6 @@ RECT 4.745 -0.085 4.915 0.085 ; RECT 5.205 -0.085 5.375 0.085 ; END -END sky130_ef_sc_hd__newfill_12 +END sky130_ef_sc_hd__decap_40_12 END LIBRARY
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_60_12.lef similarity index 94% copy from sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef copy to sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_60_12.lef index e291180..3d308ff 100644 --- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef +++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_60_12.lef
@@ -2,9 +2,9 @@ NOWIREEXTENSIONATPIN ON ; DIVIDERCHAR "/" ; BUSBITCHARS "[]" ; -MACRO sky130_ef_sc_hd__newfill_12 +MACRO sky130_ef_sc_hd__decap_60_12 CLASS CORE SPACER ; - FOREIGN sky130_ef_sc_hd__newfill_12 ; + FOREIGN sky130_ef_sc_hd__decap_60_12 ; ORIGIN 0.000 0.000 ; SIZE 5.520 BY 2.720 ; SYMMETRY X Y R90 ; @@ -74,6 +74,6 @@ RECT 4.745 -0.085 4.915 0.085 ; RECT 5.205 -0.085 5.375 0.085 ; END -END sky130_ef_sc_hd__newfill_12 +END sky130_ef_sc_hd__decap_60_12 END LIBRARY
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_80_12.lef similarity index 94% copy from sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef copy to sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_80_12.lef index e291180..c1cc0a8 100644 --- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__newfill_12.lef +++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__decap_80_12.lef
@@ -2,9 +2,9 @@ NOWIREEXTENSIONATPIN ON ; DIVIDERCHAR "/" ; BUSBITCHARS "[]" ; -MACRO sky130_ef_sc_hd__newfill_12 +MACRO sky130_ef_sc_hd__decap_80_12 CLASS CORE SPACER ; - FOREIGN sky130_ef_sc_hd__newfill_12 ; + FOREIGN sky130_ef_sc_hd__decap_80_12 ; ORIGIN 0.000 0.000 ; SIZE 5.520 BY 2.720 ; SYMMETRY X Y R90 ; @@ -74,6 +74,6 @@ RECT 4.745 -0.085 4.915 0.085 ; RECT 5.205 -0.085 5.375 0.085 ; END -END sky130_ef_sc_hd__newfill_12 +END sky130_ef_sc_hd__decap_80_12 END LIBRARY
diff --git a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fill_12.lef b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fill_12.lef index e171847..6be9b48 100644 --- a/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fill_12.lef +++ b/sky130/custom/sky130_fd_sc_hd/lef/sky130_ef_sc_hd__fill_12.lef
@@ -28,7 +28,7 @@ USE POWER ; PORT LAYER nwell ; - RECT -0.190 1.305 2.950 2.910 ; + RECT -0.190 1.305 5.710 2.910 ; END END VPB PIN VNB @@ -36,17 +36,17 @@ USE GROUND ; PORT LAYER pwell ; - RECT 0.005 0.105 2.755 0.915 ; + RECT 0.005 0.105 5.515 0.915 ; RECT 0.145 -0.085 0.315 0.105 ; END END VNB OBS LAYER li1 ; RECT 0.000 2.635 5.520 2.805 ; - RECT 0.085 1.545 2.675 2.635 ; - RECT 0.085 0.855 1.295 1.375 ; - RECT 1.465 1.025 2.675 1.545 ; - RECT 0.085 0.085 2.675 0.855 ; + RECT 0.085 2.200 5.430 2.635 ; + RECT 1.670 0.630 2.010 1.460 ; + RECT 3.490 0.950 3.840 2.200 ; + RECT 0.085 0.085 5.430 0.630 ; RECT 0.000 -0.085 5.520 0.085 ; LAYER mcon ; RECT 0.145 2.635 0.315 2.805 ;
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_20_12.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_20_12.v new file mode 100644 index 0000000..2c8af53 --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_20_12.v
@@ -0,0 +1,98 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_EF_SC_HD__DECAP_20_12_V +`define SKY130_EF_SC_HD__DECAP_20_12_V + +/** + * decap: Decoupling capacitance filler. + * + * Verilog wrapper for decap with size of 12 units. + * This cell has been modified from sky130_fd_sc_hd__decap_12 + * to remove excess LI, so that when used extensively in a + * padded region of a digital layout, it does not cause the + * LI layer to exceed critical density. Additionally, this + * cell was modified from sky130_ef_sc_hd__decap_12 to remove + * excess poly, so that when used extensively in a padded + * region of a digital layout, it does not cause the POLY + * layer to exceed critical density. A combination of + * cells _20_12, _40_12, _60_12, and _80_12 (representing + * 20, 40, 60, and 80 percent of the original amount of poly) + * can be used to achieve a target poly density. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_ef_sc_hd__decap_20_12 ( + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + input VPWR; + input VGND; + input VPB ; + input VNB ; + // No contents. +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`ifdef FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_20_12 (); + // No contents. +endmodule +`endcelldefine + +`else // If not FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_20_12 (); + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + // No contents. +endmodule +`endcelldefine + +`endif // If not FUNCTIONAL + +/*********************************************************/ +`endif // If not USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_EF_SC_HD__DECAP_20_12_V + +
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_40_12.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_40_12.v new file mode 100644 index 0000000..0df86cb --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_40_12.v
@@ -0,0 +1,98 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_EF_SC_HD__DECAP_40_12_V +`define SKY130_EF_SC_HD__DECAP_40_12_V + +/** + * decap: Decoupling capacitance filler. + * + * Verilog wrapper for decap with size of 12 units. + * This cell has been modified from sky130_fd_sc_hd__decap_12 + * to remove excess LI, so that when used extensively in a + * padded region of a digital layout, it does not cause the + * LI layer to exceed critical density. Additionally, this + * cell was modified from sky130_ef_sc_hd__decap_12 to remove + * excess poly, so that when used extensively in a padded + * region of a digital layout, it does not cause the POLY + * layer to exceed critical density. A combination of + * cells _20_12, _40_12, _60_12, and _80_12 (representing + * 20, 40, 60, and 80 percent of the original amount of poly) + * can be used to achieve a target poly density. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_ef_sc_hd__decap_40_12 ( + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + input VPWR; + input VGND; + input VPB ; + input VNB ; + // No contents. +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`ifdef FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_40_12 (); + // No contents. +endmodule +`endcelldefine + +`else // If not FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_40_12 (); + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + // No contents. +endmodule +`endcelldefine + +`endif // If not FUNCTIONAL + +/*********************************************************/ +`endif // If not USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_EF_SC_HD__DECAP_40_12_V + +
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_60_12.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_60_12.v new file mode 100644 index 0000000..e15678a --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_60_12.v
@@ -0,0 +1,98 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_EF_SC_HD__DECAP_60_12_V +`define SKY130_EF_SC_HD__DECAP_60_12_V + +/** + * decap: Decoupling capacitance filler. + * + * Verilog wrapper for decap with size of 12 units. + * This cell has been modified from sky130_fd_sc_hd__decap_12 + * to remove excess LI, so that when used extensively in a + * padded region of a digital layout, it does not cause the + * LI layer to exceed critical density. Additionally, this + * cell was modified from sky130_ef_sc_hd__decap_12 to remove + * excess poly, so that when used extensively in a padded + * region of a digital layout, it does not cause the POLY + * layer to exceed critical density. A combination of + * cells _20_12, _40_12, _60_12, and _80_12 (representing + * 20, 40, 60, and 80 percent of the original amount of poly) + * can be used to achieve a target poly density. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_ef_sc_hd__decap_60_12 ( + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + input VPWR; + input VGND; + input VPB ; + input VNB ; + // No contents. +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`ifdef FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_60_12 (); + // No contents. +endmodule +`endcelldefine + +`else // If not FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_60_12 (); + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + // No contents. +endmodule +`endcelldefine + +`endif // If not FUNCTIONAL + +/*********************************************************/ +`endif // If not USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_EF_SC_HD__DECAP_60_12_V + +
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_80_12.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_80_12.v new file mode 100644 index 0000000..16c9712 --- /dev/null +++ b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__decap_80_12.v
@@ -0,0 +1,98 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_EF_SC_HD__DECAP_80_12_V +`define SKY130_EF_SC_HD__DECAP_80_12_V + +/** + * decap: Decoupling capacitance filler. + * + * Verilog wrapper for decap with size of 12 units. + * This cell has been modified from sky130_fd_sc_hd__decap_12 + * to remove excess LI, so that when used extensively in a + * padded region of a digital layout, it does not cause the + * LI layer to exceed critical density. Additionally, this + * cell was modified from sky130_ef_sc_hd__decap_12 to remove + * excess poly, so that when used extensively in a padded + * region of a digital layout, it does not cause the POLY + * layer to exceed critical density. A combination of + * cells _20_12, _40_12, _60_12, and _80_12 (representing + * 20, 40, 60, and 80 percent of the original amount of poly) + * can be used to achieve a target poly density. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_ef_sc_hd__decap_80_12 ( + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + input VPWR; + input VGND; + input VPB ; + input VNB ; + // No contents. +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`ifdef FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_80_12 (); + // No contents. +endmodule +`endcelldefine + +`else // If not FUNCTIONAL + +`celldefine +module sky130_ef_sc_hd__decap_80_12 (); + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + // No contents. +endmodule +`endcelldefine + +`endif // If not FUNCTIONAL + +/*********************************************************/ +`endif // If not USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_EF_SC_HD__DECAP_80_12_V + +
diff --git a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__newfill_12.v b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fill_2.v similarity index 78% rename from sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__newfill_12.v rename to sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fill_2.v index b33927a..430a77c 100644 --- a/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__newfill_12.v +++ b/sky130/custom/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fill_2.v
@@ -16,30 +16,32 @@ * SPDX-License-Identifier: Apache-2.0 */ -`ifndef SKY130_EF_SC_HD__NEWFILL_12_V -`define SKY130_EF_SC_HD__NEWFILL_12_V +`ifndef SKY130_EF_SC_HD__FILL_2_V +`define SKY130_EF_SC_HD__FILL_2_V /** - * newfill_12: Designed to replace the decap_12 cell while reducing - * the amount of local interconnect and satisfying the more restrictive - * poly density rule of 38%. + * fill: Fill cell. + * + * Verilog wrapper for fill with size of 4 units. + * + * WARNING: This file is autogenerated, do not modify directly! */ `timescale 1ns / 1ps `default_nettype none - `ifdef USE_POWER_PINS /*********************************************************/ `celldefine -module sky130_ef_sc_hd__newfill_12 ( +module sky130_ef_sc_hd__fill_2 ( VPWR, VGND, VPB , VNB ); + // Module ports input VPWR; input VGND; input VPB ; @@ -53,7 +55,7 @@ /*********************************************************/ `celldefine -module sky130_ef_sc_hd__newfill_12 (); +module sky130_ef_sc_hd__fill_2 (); // Voltage supply signals supply1 VPWR; @@ -68,4 +70,4 @@ `endif // USE_POWER_PINS `default_nettype wire -`endif // SKY130_EF_SC_HD__NEWFILL_12_V +`endif // SKY130_EF_SC_HD__FILL_2_V