Corrected more python strings which needed to be made into "r-strings"
to keep python from issuing error messages about them. Finished
changing the repository locations in github from efabless to
fossi-foundation. Rebuilt both open PDKs and regenerated the
reference hashes.
diff --git a/common/create_verilog_library.py b/common/create_verilog_library.py
index 3761540..39d671b 100755
--- a/common/create_verilog_library.py
+++ b/common/create_verilog_library.py
@@ -133,21 +133,21 @@
def create_blackboxes(ntext):
updated = []
- modrex = re.compile('^[ \t]*module[ \t\n]+')
- endrex = re.compile('^[ \t]*endmodule[ \t\n]+')
- inrex = re.compile('^[ \t]*input[ \t\n]+')
- outrex = re.compile('^[ \t]*output[ \t\n]+')
- inoutrex = re.compile('^[ \t]*inout[ \t\n]+')
- ifrex = re.compile('^[ \t]*`if')
- elsrex = re.compile('^[ \t]*`els')
- endifrex = re.compile('^[ \t]*`end')
- suprex = re.compile('^[ \t]*supply')
+ modrex = re.compile(r'^[ \t]*module[ \t\n]+')
+ endrex = re.compile(r'^[ \t]*endmodule[ \t\n]+')
+ inrex = re.compile(r'^[ \t]*input[ \t\n]+')
+ outrex = re.compile(r'^[ \t]*output[ \t\n]+')
+ inoutrex = re.compile(r'^[ \t]*inout[ \t\n]+')
+ ifrex = re.compile(r'^[ \t]*`if')
+ elsrex = re.compile(r'^[ \t]*`els')
+ endifrex = re.compile(r'^[ \t]*`end')
+ suprex = re.compile(r'^[ \t]*supply')
in_mod = False
depth = 0
for line in ntext.splitlines():
# Strip any comments from line before checking
- nocline = re.sub('[ \t]*//.*', '', line)
+ nocline = re.sub(r'[ \t]*//.*', '', line)
if not in_mod:
mmatch = modrex.match(nocline)
if mmatch:
diff --git a/common/find_all_devices.py b/common/find_all_devices.py
index 71c27c5..59c6ebd 100755
--- a/common/find_all_devices.py
+++ b/common/find_all_devices.py
@@ -207,8 +207,8 @@
allcells = os.listdir(cellspath)
- subcktrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+', re.IGNORECASE)
- includerex = re.compile('\.include[ \t]+([^ \t]+)', re.IGNORECASE)
+ subcktrex = re.compile(r'\.subckt[ \t]+([^ \t]+)[ \t]+', re.IGNORECASE)
+ includerex = re.compile(r'\.include[ \t]+([^ \t]+)', re.IGNORECASE)
filesdict = {}
subcktdict = {}
@@ -291,7 +291,7 @@
# of all primitive devices used in the file by cross-checking against
# the dictionary of subcircuits.
- devrex = re.compile('x([^ \t]+)[ \t]+(.*)', re.IGNORECASE)
+ devrex = re.compile(r'x([^ \t]+)[ \t]+(.*)', re.IGNORECASE)
incfiles = []
with open(sourcefile, 'r') as ifile:
diff --git a/common/fix_subckt_params.py b/common/fix_subckt_params.py
index f961326..e5fcb18 100755
--- a/common/fix_subckt_params.py
+++ b/common/fix_subckt_params.py
@@ -38,10 +38,10 @@
def param_split(line, params, debug):
# Regexp patterns
- parm1rex = re.compile('(\.param[ \t]+)(.*)')
- parm2rex = re.compile('(\+[ \t]*)(.*)')
- parm3rex = re.compile('([^= \t]+)([ \t]*=[ \t]*[^ \t]+[ \t]*)(.*)')
- parm4rex = re.compile('([^= \t]+)([ \t]*)(.*)')
+ parm1rex = re.compile(r'(\.param[ \t]+)(.*)')
+ parm2rex = re.compile(r'(\+[ \t]*)(.*)')
+ parm3rex = re.compile(r'([^= \t]+)([ \t]*=[ \t]*[^ \t]+[ \t]*)(.*)')
+ parm4rex = re.compile(r'([^= \t]+)([ \t]*)(.*)')
part1 = ''
part2 = ''
@@ -95,11 +95,11 @@
def convert_file(in_file, out_path, params, debug):
# Regexp patterns
- paramrex = re.compile('\.param[ \t]+(.*)')
- subrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
- modelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
- endsubrex = re.compile('\.ends[ \t]+(.+)')
- increx = re.compile('\.include[ \t]+')
+ paramrex = re.compile(r'\.param[ \t]+(.*)')
+ subrex = re.compile(r'\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
+ modelrex = re.compile(r'\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
+ endsubrex = re.compile(r'\.ends[ \t]+(.+)')
+ increx = re.compile(r'\.include[ \t]+')
with open(in_file, 'r') as ifile:
inplines = ifile.read().splitlines()
diff --git a/common/fixspice.py b/common/fixspice.py
index dc2fd04..6d0756a 100755
--- a/common/fixspice.py
+++ b/common/fixspice.py
@@ -74,14 +74,14 @@
modified = False
# Regular expression to find 'agauss(a,b,c)' lines and record a, b, and c
- grex = re.compile('[^{]agauss\(([^,]*),([^,]*),([^)]*)\)', re.IGNORECASE)
+ grex = re.compile(r'[^{]agauss\(([^,]*),([^,]*),([^)]*)\)', re.IGNORECASE)
# Regular expression to determine if the line is a .PARAM card
- paramrex = re.compile('^\.param', re.IGNORECASE)
+ paramrex = re.compile(r'^\.param', re.IGNORECASE)
# Regular expression to determine if the line is a .MODEL card
- modelrex = re.compile('^\.model', re.IGNORECASE)
+ modelrex = re.compile(r'^\.model', re.IGNORECASE)
# Regular expression to detect a .SUBCKT card
- subcktrex = re.compile('^\.subckt', re.IGNORECASE)
+ subcktrex = re.compile(r'^\.subckt', re.IGNORECASE)
for line in spilines:
devtype = line[0].upper() if len(line) > 0 else 0
@@ -130,21 +130,21 @@
# Fixes related specifically to MOS models:
# Fix: Look for hspver=98.2 in FET model
- altered = re.sub(' hspver[ ]*=[ ]*98\.2', ' ', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' hspver[ ]*=[ ]*98\.2', ' ', fixedline, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
print('Removed hspver=98.2 from ' + modeltype + ' model')
# Fix: Change level 53 FETs to level 49
- altered = re.sub(' (level[ ]*=[ ]*)53', ' \g<1>49', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' (level[ ]*=[ ]*)53', ' \g<1>49', fixedline, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
print('Changed level 53 ' + modeltype + ' to level 49')
# Fix: Look for version=4.3 or 4.5 FETs, change to 4.8.0 per recommendations
- altered = re.sub(' (version[ ]*=[ ]*)4\.[35]', ' \g<1>4.8.0',
+ altered = re.sub(r' (version[ ]*=[ ]*)4\.[35]', ' \g<1>4.8.0',
fixedline, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
@@ -209,7 +209,7 @@
print('Removed tref= from ' + modeltype + ' model')
# Fix: Look for double-dot model binning and replace with single dot
- altered = re.sub('\.\.([0-9]+)', '.\g<1>', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r'\.\.([0-9]+)', '.\g<1>', fixedline, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
@@ -220,30 +220,30 @@
# usual numeric assignments.
if devtype == 'M':
- altered = re.sub(' nf=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
- altered = re.sub(' nf=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
+ altered = re.sub(r' nf=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' nf=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
print('Removed nf= from MOSFET device instance')
- altered = re.sub(' mulu0=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
- altered = re.sub(' mulu0=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
+ altered = re.sub(r' mulu0=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' mulu0=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
print('Removed mulu0= from MOSFET device instance')
- altered = re.sub(' s[abcd]=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
- altered = re.sub(' s[abcd]=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
+ altered = re.sub(r' s[abcd]=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' s[abcd]=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
print('Removed s[abcd]= from MOSFET device instance')
# Remove tref= from all device type instances
- altered = re.sub(' tref=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
- altered = re.sub(' tref=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
+ altered = re.sub(r' tref=[^ \'\t]+', ' ', fixedline, flags=re.IGNORECASE)
+ altered = re.sub(r' tref=\'[^\'\t]+\'', ' ', altered, flags=re.IGNORECASE)
if altered != fixedline:
fixedline = altered
if debug:
diff --git a/common/print_subckt_params.py b/common/print_subckt_params.py
index 66786ca..b26339a 100755
--- a/common/print_subckt_params.py
+++ b/common/print_subckt_params.py
@@ -21,9 +21,9 @@
def parse_pins(line, debug):
# Regexp patterns
- subrex = re.compile('\.subckt[ \t]+[^ \t]+[ \t]+(.*)')
- parm1rex = re.compile('([^= \t]+)[ \t]*=[ \t]*[^ \t]+[ \t]*(.*)')
- parm2rex = re.compile('([^= \t]+)[ \t]*(.*)')
+ subrex = re.compile(r'\.subckt[ \t]+[^ \t]+[ \t]+(.*)')
+ parm1rex = re.compile(r'([^= \t]+)[ \t]*=[ \t]*[^ \t]+[ \t]*(.*)')
+ parm2rex = re.compile(r'([^= \t]+)[ \t]*(.*)')
params = []
@@ -58,10 +58,10 @@
def param_parse(line, debug):
# Regexp patterns
- parm1rex = re.compile('\.param[ \t]+(.*)')
- parm2rex = re.compile('\+[ \t]*(.*)')
- parm3rex = re.compile('([^= \t]+)[ \t]*=[ \t]*[^ \t]+[ \t]*(.*)')
- parm4rex = re.compile('([^= \t]+)[ \t]*(.*)')
+ parm1rex = re.compile(r'\.param[ \t]+(.*)')
+ parm2rex = re.compile(r'\+[ \t]*(.*)')
+ parm3rex = re.compile(r'([^= \t]+)[ \t]*=[ \t]*[^ \t]+[ \t]*(.*)')
+ parm4rex = re.compile(r'([^= \t]+)[ \t]*(.*)')
if debug:
print('Diagnostic: param line in = "' + line + '"')
@@ -97,11 +97,11 @@
def parse_file(in_file, debug):
# Regexp patterns
- paramrex = re.compile('\.param[ \t]+(.*)')
- subrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
- modelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
- endsubrex = re.compile('\.ends[ \t]+(.+)')
- increx = re.compile('\.include[ \t]+')
+ paramrex = re.compile(r'\.param[ \t]+(.*)')
+ subrex = re.compile(r'\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
+ modelrex = re.compile(r'\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
+ endsubrex = re.compile(r'\.ends[ \t]+(.+)')
+ increx = re.compile(r'\.include[ \t]+')
with open(in_file, 'r') as ifile:
inplines = ifile.read().splitlines()
diff --git a/common/remove_specify.py b/common/remove_specify.py
index 746a06f..b26805f 100755
--- a/common/remove_specify.py
+++ b/common/remove_specify.py
@@ -34,10 +34,10 @@
# case that has been seen seems to work under the assumption that leading
# whitespace is ignored up to the amount used by the last indentation.
- vlines = re.sub('\\\\\n[ \t]*', '', vtext)
+ vlines = re.sub(r'\\\\\n[ \t]*', '', vtext)
- specrex = re.compile('\n[ \t]*specify[ \t\n]+')
- endspecrex = re.compile('\n[ \t]*endspecify')
+ specrex = re.compile(r'\n[ \t]*specify[ \t\n]+')
+ endspecrex = re.compile(r'\n[ \t]*endspecify')
smatch = specrex.search(vlines)
while smatch:
specstart = smatch.start()
diff --git a/common/save_commit_refs.py b/common/save_commit_refs.py
index c226313..d1179a5 100755
--- a/common/save_commit_refs.py
+++ b/common/save_commit_refs.py
@@ -83,8 +83,8 @@
print("Error: Cannot open file " + outputfile + " for writing.\n", file=sys.stderr)
return
- keyrex = re.compile('[ \t]*"([^"]+)":[ \t]*"[^"]+"')
- valuerex = re.compile('[ \t]*"[^"]+":[ \t]*"([a-z0-9]+)"')
+ keyrex = re.compile(r'[ \t]*"([^"]+)":[ \t]*"[^"]+"')
+ valuerex = re.compile(r'[ \t]*"[^"]+":[ \t]*"([a-z0-9]+)"')
distdefs = {}
defs = []
diff --git a/common/spectre_to_spice.py b/common/spectre_to_spice.py
index 52698e0..136f2a4 100755
--- a/common/spectre_to_spice.py
+++ b/common/spectre_to_spice.py
@@ -30,13 +30,13 @@
def parse_param_line(line, inparam, insub, iscall, ispassed, inmod, linenum):
# Regexp patterns
- parm1rex = re.compile('[ \t]*parameters[ \t]*(.*)')
- parm2rex = re.compile('[ \t]*params:[ \t]*(.*)')
- parm3rex = re.compile('[ \t]*\+[ \t]*(.*)')
- parm4rex = re.compile('[ \t]*([^= \t]+)[ \t]*=[ \t]*([^ \t]+)[ \t]*(.*)')
- parm5rex = re.compile('[ \t]*([^= \t]+)[ \t]*(.*)')
- parm6rex = re.compile('[ \t]*([^= \t]+)[ \t]*=[ \t]*([\'{][^\'}]+[\'}])[ \t]*(.*)')
- rtok = re.compile('([^ \t\n]+)[ \t]*(.*)')
+ parm1rex = re.compile(r'[ \t]*parameters[ \t]*(.*)')
+ parm2rex = re.compile(r'[ \t]*params:[ \t]*(.*)')
+ parm3rex = re.compile(r'[ \t]*\+[ \t]*(.*)')
+ parm4rex = re.compile(r'[ \t]*([^= \t]+)[ \t]*=[ \t]*([^ \t]+)[ \t]*(.*)')
+ parm5rex = re.compile(r'[ \t]*([^= \t]+)[ \t]*(.*)')
+ parm6rex = re.compile(r'[ \t]*([^= \t]+)[ \t]*=[ \t]*([\'{][^\'}]+[\'}])[ \t]*(.*)')
+ rtok = re.compile(r'([^ \t\n]+)[ \t]*(.*)')
fmtline = []
@@ -73,7 +73,7 @@
# Parameter expression given with no braces or quotes around
# the expression. Fix the expression by removing the spaces
# around '*'.
- rest = re.sub('[ \t]*([\*\+\-])[ \t]*', '\g<1>', rest)
+ rest = re.sub(r'[ \t]*([\*\+\-])[ \t]*', '\g<1>', rest)
pmatch = parm4rex.match(rest)
if pmatch:
@@ -173,20 +173,20 @@
# ngspice does not understand round(), so replace it with the equivalent
# floor() expression.
- finalline = re.sub('round\(', 'floor(0.5+', finalline)
+ finalline = re.sub(r'round\(', 'floor(0.5+', finalline)
# use of "no" and "yes" as parameter values is not allowed in ngspice.
- finalline = re.sub('sw_et[ \t]*=[ \t]*{no}', 'sw_et=0', finalline)
- finalline = re.sub('sw_et[ \t]*=[ \t]*{yes}', 'sw_et=1', finalline)
- finalline = re.sub('isnoisy[ \t]*=[ \t]*{no}', 'isnoisy=0', finalline)
- finalline = re.sub('isnoisy[ \t]*=[ \t]*{yes}', 'isnoisy=1', finalline)
+ finalline = re.sub(r'sw_et[ \t]*=[ \t]*{no}', 'sw_et=0', finalline)
+ finalline = re.sub(r'sw_et[ \t]*=[ \t]*{yes}', 'sw_et=1', finalline)
+ finalline = re.sub(r'isnoisy[ \t]*=[ \t]*{no}', 'isnoisy=0', finalline)
+ finalline = re.sub(r'isnoisy[ \t]*=[ \t]*{yes}', 'isnoisy=1', finalline)
# Use of "m" in parameters is forbidden. Specifically look for "{N*m}".
# e.g., replace "mult = {2*m}" with "mult = 2". Note that this usage
# is most likely an error in the source.
- finalline = re.sub('\{([0-9]+)\*[mM]\}', r'\1', finalline)
+ finalline = re.sub(r'\{([0-9]+)\*[mM]\}', r'\1', finalline)
return finalline, ispassed
@@ -198,7 +198,7 @@
# model name. There are only a few instances of this, so this
# routine is not rigorously checking all parameters, just entries
# on lines with ".param".
- parmrex = re.compile('[ \t]*([^= \t]+)[ \t]*=[ \t]*([^ \t]+)[ \t]*(.*)')
+ parmrex = re.compile(r'[ \t]*([^= \t]+)[ \t]*=[ \t]*([^ \t]+)[ \t]*(.*)')
rest = line
paramnames = []
while rest != '':
@@ -214,7 +214,7 @@
# binned model
def addmodel(modellines, linenum):
- typerex = re.compile('([ \t]*type[ \t]*=[ \t]*)([^ \t]+)[ \t]*', re.IGNORECASE)
+ typerex = re.compile(r'([ \t]*type[ \t]*=[ \t]*)([^ \t]+)[ \t]*', re.IGNORECASE)
# 'ZYXW' was left as a placeholder for the device type
if len(modellines) > 0:
@@ -249,31 +249,31 @@
def convert_file(in_file, out_file):
# Regexp patterns
- statrex = re.compile('[ \t]*statistics[ \t]*\{(.*)')
- simrex = re.compile('[ \t]*simulator[ \t]+([^= \t]+)[ \t]*=[ \t]*(.+)')
- insubrex = re.compile('[ \t]*inline[ \t]+subckt[ \t]+([^ \t\(]+)[ \t]*\(([^)]*)')
- cdlsubrex = re.compile('\.?subckt[ \t]+([^ \t\(]+)[ \t]*\(([^)]*)')
- endsubrex = re.compile('[ \t]*ends[ \t]+(.+)')
- endonlysubrex = re.compile('[ \t]*ends[ \t]*')
- modelrex = re.compile('[ \t]*model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+\{(.*)')
- cdlmodelrex = re.compile('[ \t]*model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)')
- binrex = re.compile('[ \t]*([0-9]+):[ \t]*(.*)')
- shincrex = re.compile('\.inc[ \t]+')
- isexprrex = re.compile('[^0-9a-zA-Z_]')
- paramrex = re.compile('\.param[ \t]+(.*)')
+ statrex = re.compile(r'[ \t]*statistics[ \t]*\{(.*)')
+ simrex = re.compile(r'[ \t]*simulator[ \t]+([^= \t]+)[ \t]*=[ \t]*(.+)')
+ insubrex = re.compile(r'[ \t]*inline[ \t]+subckt[ \t]+([^ \t\(]+)[ \t]*\(([^)]*)')
+ cdlsubrex = re.compile(r'\.?subckt[ \t]+([^ \t\(]+)[ \t]*\(([^)]*)')
+ endsubrex = re.compile(r'[ \t]*ends[ \t]+(.+)')
+ endonlysubrex = re.compile(r'[ \t]*ends[ \t]*')
+ modelrex = re.compile(r'[ \t]*model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+\{(.*)')
+ cdlmodelrex = re.compile(r'[ \t]*model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)')
+ binrex = re.compile(r'[ \t]*([0-9]+):[ \t]*(.*)')
+ shincrex = re.compile(r'\.inc[ \t]+')
+ isexprrex = re.compile(r'[^0-9a-zA-Z_]')
+ paramrex = re.compile(r'\.param[ \t]+(.*)')
- stdsubrex = re.compile('\.?subckt[ \t]+([^ \t]+)[ \t]+(.*)')
- stdmodelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)')
- stdendsubrex = re.compile('\.ends[ \t]+(.+)')
- stdendonlysubrex = re.compile('\.ends[ \t]*')
+ stdsubrex = re.compile(r'\.?subckt[ \t]+([^ \t]+)[ \t]+(.*)')
+ stdmodelrex = re.compile(r'\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)')
+ stdendsubrex = re.compile(r'\.ends[ \t]+(.+)')
+ stdendonlysubrex = re.compile(r'\.ends[ \t]*')
# Devices (resistor, capacitor, subcircuit as resistor or capacitor)
- caprex = re.compile('c([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*capacitor[ \t]*(.*)', re.IGNORECASE)
- resrex = re.compile('r([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*resistor[ \t]*(.*)', re.IGNORECASE)
- cdlrex = re.compile('[ \t]*([npcrdlmqx])([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
- stddevrex = re.compile('[ \t]*([crd])([^ \t]+)[ \t]+([^ \t]+[ \t]+[^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
- stddev2rex = re.compile('[ \t]*([crd])([^ \t]+)[ \t]+([^ \t]+[ \t]+[^ \t]+)[ \t]+([^ \t\'{]+[\'{][^\'}]+[\'}])[ \t]*(.*)', re.IGNORECASE)
- stddev3rex = re.compile('[ \t]*([npcrdlmqx])([^ \t]+)[ \t]+(.*)', re.IGNORECASE)
+ caprex = re.compile(r'c([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*capacitor[ \t]*(.*)', re.IGNORECASE)
+ resrex = re.compile(r'r([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*resistor[ \t]*(.*)', re.IGNORECASE)
+ cdlrex = re.compile(r'[ \t]*([npcrdlmqx])([^ \t]+)[ \t]*\(([^)]*)\)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ stddevrex = re.compile(r'[ \t]*([crd])([^ \t]+)[ \t]+([^ \t]+[ \t]+[^ \t]+)[ \t]+([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ stddev2rex = re.compile(r'[ \t]*([crd])([^ \t]+)[ \t]+([^ \t]+[ \t]+[^ \t]+)[ \t]+([^ \t\'{]+[\'{][^\'}]+[\'}])[ \t]*(.*)', re.IGNORECASE)
+ stddev3rex = re.compile(r'[ \t]*([npcrdlmqx])([^ \t]+)[ \t]+(.*)', re.IGNORECASE)
with open(in_file, 'r') as ifile:
try:
@@ -287,7 +287,7 @@
# because any subcircuit call could be a forward reference.
#---------------------------------------------------------------
- allsubrex = re.compile('.*subckt[ \t]+([^ \t\(]+)')
+ allsubrex = re.compile(r'.*subckt[ \t]+([^ \t\(]+)')
subnames = []
for line in speclines:
testline = line.strip()
@@ -492,9 +492,9 @@
ispassed = True
subname = imatch.group(1)
if isspectre:
- devrex = re.compile('[ \t]*' + subname + '[ \t]*\(([^)]*)\)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ devrex = re.compile(r'[ \t]*' + subname + r'[ \t]*\(([^)]*)\)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
else:
- devrex = re.compile('[ \t]*' + subname + '[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ devrex = re.compile(r'[ \t]*' + subname + r'[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
# If there is no close-parenthesis then we should expect it on
# a continuation line
inpinlist = True if ')' not in line else False
@@ -795,20 +795,20 @@
# (NOTE: Need more generic handling here, as perimeter parameter
# could be in a continuation line)
- perimrex = re.compile('perim([ \t]*=[ \t]*)', re.IGNORECASE)
+ perimrex = re.compile(r'perim([ \t]*=[ \t]*)', re.IGNORECASE)
for j in range(len(spicelines)):
line = spicelines[j]
if len(line) > 1 and line[0].lower() == 'd':
- spicelines[j] = perimrex.sub('pj\g<1>', line)
+ spicelines[j] = perimrex.sub(r'pj\g<1>', line)
# Catching the spectre use of "m" is difficult, so do another pass
# on "spicelines" to catch which subcircuits use "*m" expressions,
# then for those subcircuits, add "mult=1" to the subcircuit
# parameters. (NOTE: Need a more generic regular expression here)
- sqrtrex = re.compile('.*(sqrt\([ \t]*[^ \t]+[ \t]*\*[ \t]*)m[ \t]*\)', re.IGNORECASE)
- sqsubrex = re.compile('(sqrt\([ \t]*[^ \t]+[ \t]*\*[ \t]*)m[ \t]*\)', re.IGNORECASE)
- subrex = re.compile('\.subckt[ \t]+([^ \t\(]+)[ \t]*', re.IGNORECASE)
+ sqrtrex = re.compile(r'.*(sqrt\([ \t]*[^ \t]+[ \t]*\*[ \t]*)m[ \t]*\)', re.IGNORECASE)
+ sqsubrex = re.compile(r'(sqrt\([ \t]*[^ \t]+[ \t]*\*[ \t]*)m[ \t]*\)', re.IGNORECASE)
+ subrex = re.compile(r'\.subckt[ \t]+([^ \t\(]+)[ \t]*', re.IGNORECASE)
needmult = []
for j in range(len(spicelines)):
line = spicelines[j]
@@ -817,7 +817,7 @@
cursub = smatch.group(1)
smatch = sqrtrex.match(line)
if smatch:
- spicelines[j] = sqsubrex.sub('\g<1>mult)', line)
+ spicelines[j] = sqsubrex.sub(r'\g<1>mult)', line)
needmult.append(cursub)
# Now add "mult=1" parameter to any subcircuit in the "needmult" list
@@ -828,12 +828,12 @@
spicelines[j] = line + ' mult=1'
# Check for resistor models using "tc1r" and "tc2r"
- rmodrex = re.compile('.*[ \t]+tc[12]r[ \t]+=', re.IGNORECASE)
+ rmodrex = re.compile(r'.*[ \t]+tc[12]r[ \t]+=', re.IGNORECASE)
for j in range(len(spicelines)):
line = spicelines[j]
rmatch = rmodrex.match(line)
if rmatch:
- spicelines[j] = re.sub('([ \t]+tc[12])r([ \t])', '\g<1>\g<2>', line)
+ spicelines[j] = re.sub(r'([ \t]+tc[12])r([ \t])', '\g<1>\g<2>', line)
# Output the result to out_file.
with open(out_file, 'w') as ofile:
diff --git a/common/split_one_spice.py b/common/split_one_spice.py
index be87d7a..723c77d 100755
--- a/common/split_one_spice.py
+++ b/common/split_one_spice.py
@@ -22,11 +22,11 @@
def convert_file(in_file, out_path):
# Regexp patterns
- paramrex = re.compile('\.param[ \t]+(.*)')
- subrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
- modelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
- endsubrex = re.compile('\.ends[ \t]+(.+)')
- increx = re.compile('\.include[ \t]+')
+ paramrex = re.compile(r'\.param[ \t]+(.*)')
+ subrex = re.compile(r'\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
+ modelrex = re.compile(r'\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
+ endsubrex = re.compile(r'\.ends[ \t]+(.+)')
+ increx = re.compile(r'\.include[ \t]+')
with open(in_file, 'r') as ifile:
inplines = ifile.read().splitlines()
@@ -205,7 +205,7 @@
linedest[tline] = fileno
tline += 1;
- devrex = re.compile(subname + '[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ devrex = re.compile(subname + r'[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
inpinlist = True
linedest[lineno] = fileno
continue
diff --git a/common/split_spice.py b/common/split_spice.py
index dedad24..c278252 100755
--- a/common/split_spice.py
+++ b/common/split_spice.py
@@ -26,11 +26,11 @@
def convert_file(in_file, out_path, out_file):
# Regexp patterns
- paramrex = re.compile('\.param[ \t]+(.*)')
- subrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
- modelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
- endsubrex = re.compile('\.ends[ \t]+(.+)')
- increx = re.compile('\.include[ \t]+')
+ paramrex = re.compile(r'\.param[ \t]+(.*)')
+ subrex = re.compile(r'\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
+ modelrex = re.compile(r'\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
+ endsubrex = re.compile(r'\.ends[ \t]+(.+)')
+ increx = re.compile(r'\.include[ \t]+')
with open(in_file, 'r') as ifile:
inplines = ifile.read().splitlines()
@@ -115,7 +115,7 @@
if imatch:
insubckt = True
subname = imatch.group(1)
- devrex = re.compile(subname + '[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
+ devrex = re.compile(subname + r'[ \t]*([^ \t]+)[ \t]*([^ \t]+)[ \t]*(.*)', re.IGNORECASE)
inpinlist = True
subcktlines.append(line)
continue
diff --git a/gf180mcu/Makefile.in b/gf180mcu/Makefile.in
index d2a303e..1d5b4aa 100644
--- a/gf180mcu/Makefile.in
+++ b/gf180mcu/Makefile.in
@@ -171,16 +171,16 @@
# Path to GF180MCU library sources
PDK_URL = https://github.com/google
OSU_URL = https://github.com/stineje
-EF_URL = https://github.com/efabless
+FOSSI_URL = https://github.com/fossi-foundation
# Names of library repositories
# NOTE: Switching PDK_LIB_PR and PDK_LIB_SC_7T5V0 to Efabless versions
# having "quick fixes" under development.
-PDK_LIB_PR = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pr
-PDK_LIB_PV = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pv
-PDK_LIB_IO = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_io
-PDK_LIB_SC_7T5V0 = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0
-PDK_LIB_SC_9T5V0 = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
+PDK_LIB_PR = ${FOSSI_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pr
+PDK_LIB_PV = ${FOSSI_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pv
+PDK_LIB_IO = ${FOSSI_URL}/globalfoundries-pdk-libs-gf180mcu_fd_io
+PDK_LIB_SC_7T5V0 = ${FOSSI_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0
+PDK_LIB_SC_9T5V0 = ${FOSSI_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
PDK_LIB_SRAM = ${PDK_URL}/globalfoundries-pdk-ip-gf180mcu_fd_ip_sram
PDK_LIB_OSU_SC = ${OSU_URL}/globalfoundries-pdk-libs-gf180mcu_osu_sc
diff --git a/gf180mcu/custom/scripts/convert_io_cdl.py b/gf180mcu/custom/scripts/convert_io_cdl.py
index fcbc9b3..30e3786 100755
--- a/gf180mcu/custom/scripts/convert_io_cdl.py
+++ b/gf180mcu/custom/scripts/convert_io_cdl.py
@@ -28,8 +28,8 @@
fixedlines = []
modified = False
- resrex = re.compile('^R', re.IGNORECASE)
- caprex = re.compile('^C', re.IGNORECASE)
+ resrex = re.compile(r'^R', re.IGNORECASE)
+ caprex = re.compile(r'^C', re.IGNORECASE)
for line in spilines:
fixedline = line
@@ -40,14 +40,14 @@
# 1) Lines starting with R, C, or M --> change to X
fixedline = re.sub('^[RCM]', 'X', fixedline, flags=re.IGNORECASE)
# 2) Names in $[...] --> remove the delimiter
- fixedline = re.sub(' \$\[', ' ', fixedline, flags=re.IGNORECASE)
- fixedline = re.sub('\] ', ' ', fixedline, flags=re.IGNORECASE)
+ fixedline = re.sub(r' \$\[', ' ', fixedline, flags=re.IGNORECASE)
+ fixedline = re.sub(r'\] ', ' ', fixedline, flags=re.IGNORECASE)
# 3) Remove $SUB=
- fixedline = re.sub('\$SUB=', '', fixedline, flags=re.IGNORECASE)
+ fixedline = re.sub(r'\$SUB=', '', fixedline, flags=re.IGNORECASE)
# 4) Handle $W and $L for resistors
if isres:
- fixedline = re.sub('\$W', 'r_width', fixedline, flags=re.IGNORECASE)
- fixedline = re.sub('\$L', 'r_length', fixedline, flags=re.IGNORECASE)
+ fixedline = re.sub(r'\$W', 'r_width', fixedline, flags=re.IGNORECASE)
+ fixedline = re.sub(r'\$L', 'r_length', fixedline, flags=re.IGNORECASE)
if iscap:
fixedline = re.sub('w=', 'c_width=', fixedline, flags=re.IGNORECASE)
fixedline = re.sub('l=', 'c_length=', fixedline, flags=re.IGNORECASE)
diff --git a/gf180mcu/custom/scripts/fix_digital_lef.py b/gf180mcu/custom/scripts/fix_digital_lef.py
index 1bb9ad1..387038b 100755
--- a/gf180mcu/custom/scripts/fix_digital_lef.py
+++ b/gf180mcu/custom/scripts/fix_digital_lef.py
@@ -29,8 +29,8 @@
fixedlines = []
modified = False
- endrex = re.compile('[ \t]*END[ \t]+VSS')
- macrorex = re.compile('^MACRO[ \t]+([^ \t\n]+)')
+ endrex = re.compile(r'[ \t]*END[ \t]+VSS')
+ macrorex = re.compile(r'^MACRO[ \t]+([^ \t\n]+)')
macroname = None
for line in llines:
diff --git a/gf180mcu/custom/scripts/fix_io_lef.py b/gf180mcu/custom/scripts/fix_io_lef.py
index 661e4f8..402e214 100755
--- a/gf180mcu/custom/scripts/fix_io_lef.py
+++ b/gf180mcu/custom/scripts/fix_io_lef.py
@@ -42,10 +42,10 @@
fixedlines = []
modified = False
- macrorex = re.compile('[ \t]*MACRO[ \t]+([^ \t\n]+)')
- pinrex = re.compile('[ \t]*PIN[ \t]+([^ \t\n]+)')
- userex = re.compile('[ \t]*USE[ \t]+([^ \t\n]+)')
- endrex = re.compile('[ \t]*END[ \t]+([^ \t\n]+)')
+ macrorex = re.compile(r'[ \t]*MACRO[ \t]+([^ \t\n]+)')
+ pinrex = re.compile(r'[ \t]*PIN[ \t]+([^ \t\n]+)')
+ userex = re.compile(r'[ \t]*USE[ \t]+([^ \t\n]+)')
+ endrex = re.compile(r'[ \t]*END[ \t]+([^ \t\n]+)')
macroidx = -1
pinidx = -1
diff --git a/gf180mcu/custom/scripts/fix_related_bias_pins.py b/gf180mcu/custom/scripts/fix_related_bias_pins.py
index 19b4c05..e491778 100755
--- a/gf180mcu/custom/scripts/fix_related_bias_pins.py
+++ b/gf180mcu/custom/scripts/fix_related_bias_pins.py
@@ -37,8 +37,8 @@
power_types = ['primary_power', 'primary_ground', 'backup_power',
'internal_power', 'internal_ground']
- pg_re = re.compile('\s*pg_pin\s*\(\s*"?([^\s]+)"?\s*\)\s*{')
- well_re = re.compile('\s*pg_type\s*:\s*"?([^\s]+)"?\s*;')
+ pg_re = re.compile(r'\s*pg_pin\s*\(\s*"?([^\s]+)"?\s*\)\s*{')
+ well_re = re.compile(r'\s*pg_type\s*:\s*"?([^\s]+)"?\s*;')
for line in slines:
pmatch = pg_re.match(line)
diff --git a/gf180mcu/custom/scripts/fix_techlef.py b/gf180mcu/custom/scripts/fix_techlef.py
index 3874d8e..f704feb 100755
--- a/gf180mcu/custom/scripts/fix_techlef.py
+++ b/gf180mcu/custom/scripts/fix_techlef.py
@@ -27,7 +27,7 @@
fixedlines = []
modified = False
- layerrex = re.compile('[ \t]*LAYER ([^ \t\n]+)')
+ layerrex = re.compile(r'[ \t]*LAYER ([^ \t\n]+)')
for line in llines:
diff --git a/gf180mcu/custom/scripts/inc_verilog.py b/gf180mcu/custom/scripts/inc_verilog.py
index 2ea70be..fc5ad6b 100755
--- a/gf180mcu/custom/scripts/inc_verilog.py
+++ b/gf180mcu/custom/scripts/inc_verilog.py
@@ -44,8 +44,8 @@
fixedlines = []
modified = False
- increx = re.compile('[ \t]*`include[ \t]+"?([^ \t\n"]+)"?')
- endrex = re.compile('[ \t]*endmodule')
+ increx = re.compile(r'[ \t]*`include[ \t]+"?([^ \t\n"]+)"?')
+ endrex = re.compile(r'[ \t]*endmodule')
inpath = os.path.split(inname)[0]
for line in vlines:
diff --git a/gf180mcu/custom/scripts/make_minmax_techlef.py b/gf180mcu/custom/scripts/make_minmax_techlef.py
index de106e3..aff01bb 100755
--- a/gf180mcu/custom/scripts/make_minmax_techlef.py
+++ b/gf180mcu/custom/scripts/make_minmax_techlef.py
@@ -54,10 +54,10 @@
tlefbase = 'gf180mcu_fd_sc_mcu' + lib + '__'
tlefnom = tlefbase + 'nom.tlef'
-resrex1 = re.compile('^[ \t]*RESISTANCE RPERSQ')
-resrex2 = re.compile('^[ \t]*ARRAYSPACING')
-layerrex = re.compile('^[ \t]*LAYER ([^ \t\n]+)')
-caprex = re.compile('^[ \t]*CAPACITANCE CPERSQDIST')
+resrex1 = re.compile(r'^[ \t]*RESISTANCE RPERSQ')
+resrex2 = re.compile(r'^[ \t]*ARRAYSPACING')
+layerrex = re.compile(r'^[ \t]*LAYER ([^ \t\n]+)')
+caprex = re.compile(r'^[ \t]*CAPACITANCE CPERSQDIST')
#--------------------------------------------------------------------
# Resistance values, by layer
diff --git a/gf180mcu/gf180mcu.json b/gf180mcu/gf180mcu.json
index d6d30a6..625e0b8 100644
--- a/gf180mcu/gf180mcu.json
+++ b/gf180mcu/gf180mcu.json
@@ -89,11 +89,11 @@
"magic": "MAGIC_COMMIT"
},
"reference": {
- "open_pdks": "c10a581884a4373c1a48b18ea3fc02c19d8d5c88",
- "magic": "4445663cb1b2de1eb9818cfe89f60ed7659335f3",
+ "open_pdks": "ca4dc508d0b95eb84e4b6d79ae7011b849063a18",
+ "magic": "02669de267fb4b658306946d36323b6601df639d",
"gf180mcu_pdk": "a897aa30369d3bcec87d9d50ce9b01f320f854ef",
- "gf180mcu_fd_pr": "a11222d681f2134ab28e97f97b9b99b6af188f88",
- "gf180mcu_fd_pv": "e9410df04da5b64a1053aa6e5180dc144b8a12a2",
+ "gf180mcu_fd_pr": "aacc04cc30ed119baaa616dff266cca7006dc3d6",
+ "gf180mcu_fd_pv": "10ee7fc75437edafa56f29f2b1872e95c9f22b71",
"gf180mcu_fd_io": "f84fe10e67a5cb9002e9ae8210f58e570726c366",
"gf180mcu_fd_sc_mcu7t5v0": "8743b6f9641eb8707179c4e51703380d4dc90f16",
"gf180mcu_fd_sc_mcu9t5v0": "376ea56fa36ce7702595ce4e0e3c9357ee38c81c",
diff --git a/sky130/Makefile.in b/sky130/Makefile.in
index 44e64ef..45fa6f9 100644
--- a/sky130/Makefile.in
+++ b/sky130/Makefile.in
@@ -302,7 +302,6 @@
REFERENCE_JSON =
endif
-EF_URL = https://github.com/efabless
FOSSI_URL = https://github.com/fossi-foundation
GOOGLE_URL = https://foss-eda-tools.googlesource.com
@@ -319,8 +318,8 @@
ALPHA_URL = https://github.com/PaulSchulz/sky130_pschulz_xx_hd
XSCHEM_URL = https://github.com/StefanSchippers/xschem_sky130
-KLAYOUT_URL = ${EF_URL}/sky130_klayout_pdk
-PRECHECK_URL = ${EF_URL}/mpw_precheck
+KLAYOUT_URL = ${FOSSI_URL}/sky130_klayout_pdk
+PRECHECK_URL = ${FOSSI_URL}/mpw_precheck
SRAM_URL = ${FOSSI_URL}/sky130_sram_macros
SRAM_SPACE_URL = ${GOOGLE_URL}/skywater-pdk/libs/sky130_fd_bd_sram
RERAM_URL = ${GOOGLE_URL}/skywater-pdk/libs/sky130_fd_pr_reram
diff --git a/sky130/custom/scripts/fix_io_lef.py b/sky130/custom/scripts/fix_io_lef.py
index d15b0f2..4cac891 100755
--- a/sky130/custom/scripts/fix_io_lef.py
+++ b/sky130/custom/scripts/fix_io_lef.py
@@ -34,11 +34,11 @@
modified = False
inpin = False
- macrorex = re.compile('^MACRO[ \t]+([^ \t\n]+)')
- pinrex = re.compile('^[ \t]*PIN[ \t]+[PG]_CORE')
- endrex = re.compile('[ \t]*END[ \t]+[PG]_CORE')
- rectrex = re.compile('^[ \t]*RECT[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+')
- rect2rex = re.compile('^[ \t]*RECT[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+')
+ macrorex = re.compile(r'^MACRO[ \t]+([^ \t\n]+)')
+ pinrex = re.compile(r'^[ \t]*PIN[ \t]+[PG]_CORE')
+ endrex = re.compile(r'[ \t]*END[ \t]+[PG]_CORE')
+ rectrex = re.compile(r'^[ \t]*RECT[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+')
+ rect2rex = re.compile(r'^[ \t]*RECT[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+[0-9.]+[ \t]+([0-9.]+)[ \t]+')
macroname = None
for line in llines:
diff --git a/sky130/custom/scripts/inc_verilog.py b/sky130/custom/scripts/inc_verilog.py
index df3e4af..457469f 100755
--- a/sky130/custom/scripts/inc_verilog.py
+++ b/sky130/custom/scripts/inc_verilog.py
@@ -41,10 +41,10 @@
fixedlines = []
modified = False
- increx = re.compile('[ \t]*`include[ \t]+"?([^ \t\n"]+)"?')
- ddotrex = re.compile('[^\.]+\.[^\.]+\.v')
- tdotrex = re.compile('[^\.]+\.[^\.]+\.[^\.]+\.v')
- endrex = re.compile('[ \t]*endmodule')
+ increx = re.compile(r'[ \t]*`include[ \t]+"?([^ \t\n"]+)"?')
+ ddotrex = re.compile(r'[^\.]+\.[^\.]+\.v')
+ tdotrex = re.compile(r'[^\.]+\.[^\.]+\.[^\.]+\.v')
+ endrex = re.compile(r'[ \t]*endmodule')
inpath = os.path.split(inname)[0]
for line in vlines:
diff --git a/sky130/custom/scripts/mismatch_params.py b/sky130/custom/scripts/mismatch_params.py
index 47cb853..2fee7c7 100755
--- a/sky130/custom/scripts/mismatch_params.py
+++ b/sky130/custom/scripts/mismatch_params.py
@@ -36,8 +36,8 @@
mismatch_params = []
-mmrex = re.compile('^\*[ \t]*mismatch[ \t]*\{')
-endrex = re.compile('^\*[ \t]*\}')
+mmrex = re.compile(r'^\*[ \t]*mismatch[ \t]*\{')
+endrex = re.compile(r'^\*[ \t]*\}')
filelist = []
@@ -70,7 +70,7 @@
state = 'after_mismatch'
else:
# Make sure all "A = B" syntax closes up around the equal sign.
- newline = re.sub('[ \t]*=[ \t]*', '=', line)
+ newline = re.sub(r'[ \t]*=[ \t]*', '=', line)
tokens = newline.split()
if 'vary' in tokens:
if ('dist=gauss' in tokens) or ('gauss' in tokens):
@@ -116,11 +116,11 @@
# a number of places in the models.
#--------------------------------------------------------------------
-gaussrex = re.compile('\'[ \t]+dev\/gauss=\'', re.IGNORECASE)
+gaussrex = re.compile(r'\'[ \t]+dev\/gauss=\'', re.IGNORECASE)
# Same as above, for parameters that are not already expressions.
-gauss2rex = re.compile('=[ \t]*([^ \t]+)[ \t]+dev\/gauss=\'', re.IGNORECASE)
+gauss2rex = re.compile(r'=[ \t]*([^ \t]+)[ \t]+dev\/gauss=\'', re.IGNORECASE)
#--------------------------------------------------------------------
# Step 2. Make replacements
@@ -152,7 +152,7 @@
gmatch = gauss2rex.search(newline)
if gmatch:
- newline = gauss2rex.sub("='\g<1>+" + mm_switch_param + '*AGAUSS(0,1.0,1)*', newline)
+ newline = gauss2rex.sub(r"='\g<1>+" + mm_switch_param + '*AGAUSS(0,1.0,1)*', newline)
replaced_something = True
print(" Line {}: Found PSPICE dev/gauss and replaced.".format(line_number))
diff --git a/sky130/custom/scripts/process_params.py b/sky130/custom/scripts/process_params.py
index c822b7e..0026487 100755
--- a/sky130/custom/scripts/process_params.py
+++ b/sky130/custom/scripts/process_params.py
@@ -42,9 +42,9 @@
process_params = []
-parmrex = re.compile('^\.param[ \t]+')
-prrex = re.compile('^\*[ \t]*process[ \t]*\{')
-endrex = re.compile('^\*[ \t]*\}')
+parmrex = re.compile(r'^\.param[ \t]+')
+prrex = re.compile(r'^\*[ \t]*process[ \t]*\{')
+endrex = re.compile(r'^\*[ \t]*\}')
filelist = []
@@ -77,7 +77,7 @@
state = 'after_process'
else:
# Make sure all "A = B" syntax closes up around the equal sign.
- newline = re.sub('[ \t]*=[ \t]*', '=', line)
+ newline = re.sub(r'[ \t]*=[ \t]*', '=', line)
tokens = newline.split()
if 'vary' in tokens:
if ('dist=gauss' in tokens) or ('gauss' in tokens):
diff --git a/sky130/custom/scripts/sp_to_spice.py b/sky130/custom/scripts/sp_to_spice.py
index b97e7d5..ee8d31c 100755
--- a/sky130/custom/scripts/sp_to_spice.py
+++ b/sky130/custom/scripts/sp_to_spice.py
@@ -46,8 +46,8 @@
for line in slines:
# remove 'u' suffix from 'l' and 'w' parameters
- newline = re.sub('([ \t][lL]=[0-9\.]*)u', r'\1', line)
- newline = re.sub('([ \t][wW]=[0-9\.]*)u', r'\1', newline)
+ newline = re.sub(r'([ \t][lL]=[0-9\.]*)u', r'\1', line)
+ newline = re.sub(r'([ \t][wW]=[0-9\.]*)u', r'\1', newline)
# reverse bus indices - NOTE: Only works if all ports are on the subckt line
if newline.startswith(".subckt ") or newline.startswith(".SUBCKT "):
diff --git a/sky130/sky130.json b/sky130/sky130.json
index 4800903..ed2e077 100644
--- a/sky130/sky130.json
+++ b/sky130/sky130.json
@@ -94,8 +94,8 @@
"magic": "MAGIC_COMMIT"
},
"reference": {
- "open_pdks": "c10a581884a4373c1a48b18ea3fc02c19d8d5c88",
- "magic": "4445663cb1b2de1eb9818cfe89f60ed7659335f3",
+ "open_pdks": "ca4dc508d0b95eb84e4b6d79ae7011b849063a18",
+ "magic": "02669de267fb4b658306946d36323b6601df639d",
"sky130_fd_pr": "1232782c1b9fab3aacda74d67ce7c92bf7da8105",
"sky130_fd_io": "b9c10d039816c4026f9a10cf8a200b9b5caa1b63",
"sky130_fd_sc_hs": "9a855e97aa75f8a14be7eadc365c28d50045d5fc",
@@ -108,12 +108,12 @@
"sky130_osu_sc_t12": "ac90ef0c622a9377a16b5218d9da3ac4169eeaaf",
"sky130_osu_sc_t15": "95d1c19abb47e1b2945847acb4e817b1b8417c43",
"sky130_osu_sc_t18": "aa2b509f3c8f32ea94fdb55ac9768754667c1658",
- "sky130_sram_macros": "ebfbf5775c8cd433ad38a4d825e46c2275231511",
+ "sky130_sram_macros": "250e0234c456f5da500f0ca90435f1275c5e255d",
"sky130_fd_bd_sram": "be33adbcf188fdeab5c061699847d9d440f7a084",
"sky130_fd_pr_reram": "d6d2a3c6960aac0a0b12fc21221c31777bbf284d",
"sky130_ml_xx_hd": "6eb3b0718552b034f1bf1870285ff135e3fb2dcb",
- "xschem_sky130": "0597d6cd26ad460d3f4d689f9e6a11f33dc262ff",
- "klayout_sky130": "68b8aa87c129191f642da662d348e9ca6930581b",
- "precheck_sky130": "0941bdc1b62b5c3f99c8683bd11199d330af2ef3"
+ "xschem_sky130": "7d19acb9fc9c54f6de86345e454dc59e57418a26",
+ "klayout_sky130": "9861f40ff389c86fbe082122ee868a065cd4cfd4",
+ "precheck_sky130": "7eb869a4b6a5807f49d5ae738c541cce39c41ba5"
}
}
