)]}'
{
  "commit": "a1e16e9f8bc698ea1a7cffd2c895004964d77174",
  "tree": "e73927a2b655fb966763e4e8b182f67aa1ac29fc",
  "parents": [
    "72e7163cd968fd5685201f388a936a1a4a3e679b"
  ],
  "author": {
    "name": "R. Timothy Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Feb 24 13:31:52 2026 -0500"
  },
  "committer": {
    "name": "R. Timothy Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Feb 24 13:31:52 2026 -0500"
  },
  "message": "Corrected an error in the gf180mcu tech file for magic which was\nflagging a DRC error on diffusion abutting tap inside the thick\noxide mask.  Also:  Updated references, especially for sky130\nwhere the HS (high speed) standard cell library verilog files\nunderwent a substantial overhaul to fix the syntax;  also, all\nof the HS, MS, LS, and HD libraries had an additional change to\nadd wire declarations to input and output signals.  (Note that\nthe HS library was previously effectively broken across all\ntools;  the 2nd issue with HS, MS, LS, and HD libraries is\napparently transparent to the open source tools but is a problem\nwith some proprietary tools.)\n",
  "tree_diff": [
    {
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      "old_id": "51587d04c9e4f64be25937ff846dbc3b1933bfcc",
      "old_mode": 33188,
      "old_path": "VERSION",
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      "new_mode": 33188,
      "new_path": "VERSION"
    },
    {
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      "old_path": "gf180mcu/gf180mcu.json",
      "new_id": "eb9b754739b69ece1aced68c1d1334694575942d",
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      "new_path": "gf180mcu/gf180mcu.json"
    },
    {
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      "old_path": "gf180mcu/magic/gf180mcu.tech",
      "new_id": "b5181b08933f5206745e8f63bffa1d459e5fbd3a",
      "new_mode": 33188,
      "new_path": "gf180mcu/magic/gf180mcu.tech"
    },
    {
      "type": "modify",
      "old_id": "851887221568308b8cf6a85d5a132aca7e0f24ec",
      "old_mode": 33188,
      "old_path": "sky130/sky130.json",
      "new_id": "ca16d3073efa7ec72b43756b7e4e102a89cb9fcb",
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      "new_path": "sky130/sky130.json"
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}