)]}'
{
  "commit": "9c6fd95d4d02c02af005dc344804841fe40d7f3c",
  "tree": "763188d780aa4c3538e750590fbf6e7c11552fd3",
  "parents": [
    "366a4dab6ec0b670bf6b98587c0a3a8689003ae2"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Nov 29 22:34:36 2022 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Nov 29 22:34:36 2022 -0500"
  },
  "message": "Added a number of scripts to the gf180mcu build to add in the\nsubstrate and well connections VPW and VNW to all views, including\ntechnology LEF, LEF, verilog, SPICE, and liberty.  Also added a\nscript to build the minimum and maximum corner technology LEF files\nfor the two standard cell libraries, and modified the openlane\nconfiguration to make use of them.\n",
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