)]}'
{
  "commit": "94aa2afe56bb9bbad5d509f8383ed21822cb18bd",
  "tree": "d46f914d507f6792f306502f9f3566c333d19036",
  "parents": [
    "88bd42efc97c417a4b29cd4c984a9e5a1e3f04f6"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Sat Dec 19 15:46:01 2020 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Sat Dec 19 15:46:01 2020 -0500"
  },
  "message": "Added eight more overlay combination cells;  these create connections between\nthe clamp circuits and the buses as well as between the pad and buses.  There\nare very many possible combinations, but these have been limited to a smaller\nset used for the caravel chip.  Also updated the LEF views with magic 8.3.100,\nwhere a correction was made to an error that missed obstructions outside of the\nabutment bounding box when doing \"lef write -hide\".  verilog netlists have been\nupdated with the new combination cells.  The CDL netlists have been updated with\nat least black-box views to assert pin order;  and the full CDL netlist has been\nprovided where the CDL exists for the cell in skywater-pdk-scratch (development\nbuild of sky130_fd_io).\n",
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