openlane PDNsim changes \+ add `VDD_PIN_VOLTAGE` and `GND_PIN_VOLTAGE` needed by PDNsim for ir drop analysis \- remove sky130_fd_sc_hvl__tt_025C_3v30_lv1v80 from LIB_SYNTH as it breaks yosys and I don't think level shifters are needed for synth (if I understand correctly that this lib is for level shifters)
diff --git a/gf180mcu/openlane/config.tcl b/gf180mcu/openlane/config.tcl index f64c773..3c89b4d 100644 --- a/gf180mcu/openlane/config.tcl +++ b/gf180mcu/openlane/config.tcl
@@ -4,6 +4,9 @@ set ::env(VDD_PIN) "VDD" set ::env(GND_PIN) "VSS" +set ::env(VDD_PIN_VOLTAGE) "5.00" +set ::env(GND_PIN_VOLTAGE) "0.00" + set ::env(STD_CELL_POWER_PINS) "VDD VNW" set ::env(STD_CELL_GROUND_PINS) "VSS VPW"
diff --git a/sky130/openlane/config.tcl b/sky130/openlane/config.tcl index 7510497..e270bf6 100755 --- a/sky130/openlane/config.tcl +++ b/sky130/openlane/config.tcl
@@ -14,6 +14,9 @@ set ::env(VDD_PIN) "VPWR" set ::env(GND_PIN) "VGND" +set ::env(VDD_PIN_VOLTAGE) "1.80" +set ::env(GND_PIN_VOLTAGE) "0.00" + set ::env(STD_CELL_POWER_PINS) "VPWR VPB" set ::env(STD_CELL_GROUND_PINS) "VGND VNB"
diff --git a/sky130/openlane/sky130_fd_sc_hvl/config.tcl b/sky130/openlane/sky130_fd_sc_hvl/config.tcl index edc73f0..d775fb6 100644 --- a/sky130/openlane/sky130_fd_sc_hvl/config.tcl +++ b/sky130/openlane/sky130_fd_sc_hvl/config.tcl
@@ -2,17 +2,15 @@ # Technology lib #ifdef EF_FORMAT -set ::env(LIB_SYNTH) "\ - $::env(PDK_ROOT)/$::env(PDK)/libs.ref/lib/$::env(STD_CELL_LIBRARY)/sky130_fd_sc_hvl__tt_025C_3v30.lib\ - $::env(PDK_ROOT)/$::env(PDK)/libs.ref/lib/$::env(STD_CELL_LIBRARY)/sky130_fd_sc_hvl__tt_025C_3v30_lv1v80.lib\ -" +set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/lib/$::env(STD_CELL_LIBRARY)/sky130_fd_sc_hvl__tt_025C_3v30.lib" + +set ::env(VDD_PIN_VOLTAGE) "3.30" +set ::env(GND_PIN_VOLTAGE) "0.00" + set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/lib/$::env(STD_CELL_LIBRARY)/sky130_fd_sc_hvl__ff_n40C_5v50.lib" set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/lib/$::env(STD_CELL_LIBRARY)/sky130_fd_sc_hvl__ss_150C_1v65.lib" #else (!EF_FORMAT) -set ::env(LIB_SYNTH) "\ - $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__tt_025C_3v30.lib\ - $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__tt_025C_3v30_lv1v80.lib\ -" +set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__tt_025C_3v30.lib" set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__ff_n40C_5v50.lib" set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__ss_150C_1v65.lib" #endif (!EF_FORMAT)