Added "fillfet" to the gf180mcu magic techfile to properly handle
fill shapes where poly fill is placed on top of diffusion fill.
Modified the NDRES.4 rule (again) to clear all false-positive
errors in the GF I/O cells.  Corrected netgen to property handle
the matching of MiM caps with different naming conventions so
that the matching is only done when MiM caps exist in the netlist.
Otherwise, this will generate an error and the setup file may not
be completely read in, resulting in additional errors or problems.
diff --git a/VERSION b/VERSION
index dd92ad2..afa3e05 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.0.549
+1.0.550
diff --git a/gf180mcu/magic/gf180mcu.tech b/gf180mcu/magic/gf180mcu.tech
index 431112c..ba6ab21 100644
--- a/gf180mcu/magic/gf180mcu.tech
+++ b/gf180mcu/magic/gf180mcu.tech
@@ -148,6 +148,7 @@
 
  -active filldiff
  -active fillpoly
+ -active fillfet
 
   metal1 metal1,m1,met1
   metal1 rmetal1,rm1,rmet1
@@ -575,6 +576,7 @@
   obsactive implant4
   filldiff  ndiffusion
   fillpoly  polysilicon
+  fillfet   ntransistor
 
 #ifdef METALS3
   padl      metal3 via3 overglass
@@ -607,6 +609,8 @@
   compose  mvpfet  poly  mvpdiff
   compose  mvnvar  poly  mvnsd
   compose  mvpvar  poly  mvpsd
+
+  compose  fillfet fillpoly filldiff
   
 #ifdef MIM
 #ifdef METALS3
@@ -769,8 +773,8 @@
  	labels 	alldiff,schottky
  	calma 	22 0
 
- layer DIFFFILL	filldiff
-	labels	filldiff
+ layer DIFFFILL	filldiff,fillfet
+	labels	filldiff,fillfet
 	calma	22 4
 
 #-----------------------------------------------------
@@ -963,8 +967,8 @@
 	labels  allpoly port
 	calma	30 10
 
- layer POLYFILL	fillpoly
-	labels	fillpoly
+ layer POLYFILL	fillpoly,fillfet
+	labels	fillpoly,fillfet
 	calma	30 4
 
  layer PLFUSE	efuse
@@ -3060,7 +3064,7 @@
 
  spacing allactiveres allactive 440 touching_ok \
 	"Diffusion resistor spacing to unrelated diffusion < %d (NDRES.3)"
- spacing allactiveres allpoly 440 touching_ok \
+ spacing allactiveres allpoly 430 touching_ok \
 	"Diffusion resistor spacing to unrelated poly < %d (NDRES.4)"
 
 #-----------------------------
diff --git a/gf180mcu/netgen/gf180mcu_setup.tcl b/gf180mcu/netgen/gf180mcu_setup.tcl
index 61094ed..8ea9578 100644
--- a/gf180mcu/netgen/gf180mcu_setup.tcl
+++ b/gf180mcu/netgen/gf180mcu_setup.tcl
@@ -378,21 +378,27 @@
 # Ensure that the specific MiM cap model and non-specific MiM cap model will
 # be matched if they differ in the two netlists.
 #ifdef METALS3
-equate classes "-circuit1 cap_mim_2f0_m2m3_noshield" "-circuit2 cap_mim_2f0fF"
-equate classes "-circuit1 cap_mim_2f0fF" "-circuit2 cap_mim_2f0_m2m3_noshield"
+set dev1 cap_mim_2f0_m2m3_noshield
+set dev2 cap_mim_2f0fF
 #endif (METALS3)
 #ifdef METALS4
-equate classes "-circuit1 cap_mim_2f0_m3m4_noshield" "-circuit2 cap_mim_2f0fF"
-equate classes "-circuit1 cap_mim_2f0fF" "-circuit2 cap_mim_2f0_m3m4_noshield"
+set dev1 cap_mim_2f0_m3m4_noshield
+set dev2 cap_mim_2f0fF
 #endif (METALS4)
 #ifdef METALS5
-equate classes "-circuit1 cap_mim_2f0_m4m5_noshield" "-circuit2 cap_mim_2f0fF"
-equate classes "-circuit1 cap_mim_2f0fF" "-circuit2 cap_mim_2f0_m4m5_noshield"
+set dev1 cap_mim_2f0_m4m5_noshield
+set dev2 cap_mim_2f0fF
 #endif (METALS5)
 #ifdef METALS6
-equate classes "-circuit1 cap_mim_2f0_m5m6_noshield" "-circuit2 cap_mim_2f0fF"
-equate classes "-circuit1 cap_mim_2f0fF" "-circuit2 cap_mim_2f0_m5m6_noshield"
+set dev1 cap_mim_2f0_m5m6_noshield
+set dev2 cap_mim_2f0fF
 #endif (METALS6)
+if {[lsearch $cells1 $dev1] >= 0 && [lsearch $cells2 $dev2] >= 0} {
+    equate classes "-circuit1 $dev1" "-circuit2 $dev2"
+}
+if {[lsearch $cells1 $dev2] >= 0 && [lsearch $cells2 $dev1] >= 0} {
+    equate classes "-circuit1 $dev2" "-circuit2 $dev1"
+}
 #endif (MIM)
 
 #---------------------------------------------------------------