Added some (disabled) code to the inc_verilog.py script which
inserts the "specify ... endspecify" block into each of the standard
cells in the verilog library.

VERSION

diff --git a/VERSION b/VERSION
index 7e126a4..e5a4b3e 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.0.225
+1.0.226

sky130/custom/scripts/inc_verilog.py

diff --git a/sky130/custom/scripts/inc_verilog.py b/sky130/custom/scripts/inc_verilog.py
index a090b67..63f4595 100755
--- a/sky130/custom/scripts/inc_verilog.py
+++ b/sky130/custom/scripts/inc_verilog.py
@@ -25,6 +25,19 @@
         print('inc_verilog.py: failed to open ' + fnmIn + ' for reading.', file=sys.stderr)
         return 1
 
+    # Check if input file is a base cell or strength-specific cell, and check
+    # if it has a "specify" block file.  To enable this, change "False" to "True".
+    specfile = None
+    if False:
+        strrex = re.compile('(.+)_[0-9]+.v')
+        smatch = strrex.match(inname)
+        if smatch:
+            basename = smatch.group(1)
+            specname = basename + '.specify.v'
+            if os.path.exists(specname):
+                print('Specfile ' + specname + ' found for cell ' + inname)
+                specfile = specname
+
     # Process input with regexp
 
     fixedlines = []
@@ -32,6 +45,7 @@
     increx = re.compile('[ \t]*`include[ \t]+"?([^ \t\n"]+)"?')
     ddotrex = re.compile('[^\.]+\.[^\.]+\.v')
     tdotrex = re.compile('[^\.]+\.[^\.]+\.[^\.]+\.v')
+    endrex = re.compile('[ \t]*endmodule')
     inpath = os.path.split(inname)[0]
 
     for line in vlines:
@@ -71,6 +85,17 @@
                 pass
             modified = True
         else:
+            # Experimental:  Put back "specify" block.
+            if specfile:
+                ematch = endrex.match(line)
+                if ematch:
+                    fixedlines.append('`ifndef FUNCTIONAL')
+                    with open(specfile, 'r') as ispec:
+                        v3text = ispec.read()
+                        v3lines = v3text.splitlines()
+                        for line3 in v3lines:
+                            fixedlines.append(line3)
+                    fixedlines.append('`endif')
             fixedlines.append(line)
 
     # Write output