Google Git
Sign in
foss-eda-tools / third_party / opencircuitdesign.com / open_pdks / 50f669114fdede0bd4c808c681f720e482b9f3d7 / . / sky130 / custom / scripts
tree: db731dd6334ef5d0c88c9912a29e1ef4c010cfa9 [path history] [tgz]
  1. bump_bond_generator/
  2. seal_ring_generator/
  3. add_bipolar_ids.py
  4. add_properties.py
  5. add_wireloads.py
  6. check_antenna.py
  7. check_density.py
  8. fix_default_fanout_load.py
  9. fix_device_models.py
  10. fix_digital_lef.py
  11. fix_gpiov2_gds.py
  12. fix_io_lef.py
  13. fix_mismatched_opcond.py
  14. fix_related_bias_pins.py
  15. fix_serxtors_cdl.py
  16. fix_sparecell_cdl.py
  17. fix_sparecell_spice.py
  18. fix_spice_includes.py
  19. fix_spice_includes2.py
  20. fix_techlefA.py
  21. fix_techlefB.py
  22. fix_text_pin_gds.py
  23. fix_vddio_lvc_gds.py
  24. fix_vddio_overlay_gds.py
  25. fix_vddio_overlay_lvc.py
  26. fix_vddio_pad_gds.py
  27. fix_verilog.py
  28. fix_vssio_lvc_gds.py
  29. fix_vssio_overlay_gds.py
  30. fix_vssio_overlay_lvc.py
  31. fix_vssio_pad_gds.py
  32. fixspice.py
  33. gds_import_io.tcl
  34. gds_import_setup.tcl
  35. gds_import_sram.tcl
  36. generate_fill.py
  37. inc_verilog.py
  38. make_minmax_techlef.py
  39. mismatch_params.py
  40. montecarlo_hack.py
  41. pdk_download.sh
  42. pdk_update.sh
  43. process_params.py
  44. rename_cells.py
  45. rename_models.py
  46. run_standard_drc.py
  47. sky130_make_torture.tcl
  48. sp_to_spice.py
  49. text2m5.py
  50. text2mag.py
  51. vpb_vnb_convert.py
  52. wireload.lib
  53. xyce_hack.py
  54. xyce_hack2.py