diff --git a/VERSION b/VERSION
index 79728fe..8955a01 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.0.24
+1.0.26
diff --git a/common/gate_list.txt b/common/gate_list.txt
index 84fd5b7..b1097ec 100644
--- a/common/gate_list.txt
+++ b/common/gate_list.txt
@@ -98,7 +98,7 @@
 LATCHRQ	    function	Q=IQ	QB=IQB	enable  E	data_in  D	clear !R
 LATCHIRQ    function	Q=IQ	QB=IQB	enable  !E	data_in  D	clear !R
 LATCHSRQ    function	Q=IQ	QB=IQB	enable  E	data_in  D	preset !S   clear !R
-LATCHISRQ   function	Q=IQ	QB=IQB	enable  E	data_in  D	preset !S   clear !R
+LATCHISRQ   function	Q=IQ	QB=IQB	enable  !E	data_in  D	preset !S   clear !R
 
 DFF	    function	Q=IQ	clocked_on  C	    next_state  D
 DFFQ	    function	Q=IQ	function    QB=IQB   clocked_on	C   next_state	D
diff --git a/common/spectre_to_spice.py b/common/spectre_to_spice.py
index c522367..820c870 100755
--- a/common/spectre_to_spice.py
+++ b/common/spectre_to_spice.py
@@ -1,6 +1,6 @@
 #!/bin/env python3
 # Script to read all files in a directory of SPECTRE-compatible device model
-# files, and convert them to a form that is compatible with ngspice. 
+# files, and convert them to a form that is compatible with ngspice.
 
 import os
 import sys
@@ -38,7 +38,7 @@
     rtok = re.compile('([^ \t\n]+)[ \t]*(.*)')
 
     fmtline = []
-    
+
     if iscall:
         rest = line
     elif inparam:
@@ -122,7 +122,7 @@
         else:
             # Match to a CDL subckt parameter that does not have an '=' and so
             # assumes that the parameter is always passed, and therefore must
-	    # be part of the .subckt line.  A parameter without a value is not
+            # be part of the .subckt line.  A parameter without a value is not
             # legal SPICE, so supply a default value of 1.
             pmatch = parm5rex.match(rest)
             if pmatch:
@@ -148,7 +148,7 @@
     binrex = re.compile('[ \t]*([0-9]+):[ \t]+type[ \t]*=[ \t]*(.*)')
     shincrex = re.compile('\.inc[ \t]+')
 
-    stdsubrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+([^ \t]*)')
+    stdsubrex = re.compile('\.subckt[ \t]+([^ \t]+)[ \t]+(.*)')
     stdmodelrex = re.compile('\.model[ \t]+([^ \t]+)[ \t]+([^ \t]+)[ \t]+(.*)')
     stdendsubrex = re.compile('\.ends[ \t]+(.+)')
     stdendonlysubrex = re.compile('\.ends[ \t]*')
@@ -195,7 +195,9 @@
 
         # Item 1b.  In-line C++-style // comments get replaced with $ comment character
         elif ' //' in line:
-            line = line.replace(' //', ' $ ', 1) 
+            line = line.replace(' //', ' $ ', 1)
+        elif '//' in line:
+            line = line.replace('//', ' $ ', 1)
         elif '\t//' in line:
             line = line.replace('\t//', '\t$ ', 1) 
 
@@ -216,9 +218,9 @@
             contline = False
             if line.strip() != '':
                 if inparam:
-                    inparam = False 
+                    inparam = False
                 if inpinlist:
-                    inpinlist = False 
+                    inpinlist = False
 
         # Item 3.  Handle blank lines like comment lines
         if line.strip() == '':
@@ -278,7 +280,7 @@
             inparam = True
             spicelines.append(fmtline)
             continue
-        
+
         # statistics---not sure if it is always outside an inline subcircuit
         smatch = statrex.match(line)
         if smatch:
@@ -293,7 +295,8 @@
             mmatch = modelrex.match(line)
             if not mmatch:
                 mmatch = cdlmodelrex.match(line)
-                iscdl = True
+                if mmatch:
+                    iscdl = True
         else:
             mmatch = stdmodelrex.match(line)
 
@@ -362,7 +365,7 @@
                 else:
                     spicelines.append(line)
                 continue
-                
+
             else:
                 if isspectre:
                     ematch = endsubrex.match(line)
@@ -403,7 +406,7 @@
                             line = 'D' + line
                         spicelines.append(line)
 
-                        # Will need more handling here for other component types. . . 
+                        # Will need more handling here for other component types. . .
 
                     for line in calllines[1:]:
                         spicelines.append(line)
@@ -414,7 +417,7 @@
                     for line in modellines:
                         spicelines.append(line)
                     modellines = []
-                    
+
                     # Complete the subcircuit definition
                     spicelines.append('.ends ' + subname)
 
@@ -482,7 +485,7 @@
                     continue
 
             # Check for a line that begins with the subcircuit name
-          
+
             dmatch = devrex.match(line)
             if dmatch:
                 fmtline, ispassed = parse_param_line(dmatch.group(3), True, insub, True, ispassed)
@@ -513,6 +516,10 @@
                 else:
                     convtype = type
 
+                # If there is a binned model then it replaces any original
+                # model line that was saved.
+                if modellines[-1].startswith('.model'):
+                    modellines = modellines[0:-1]
                 modellines.append('')
                 modellines.append('.model ' + modname + '.' + bin + ' ' + convtype)
                 continue
diff --git a/common/split_spice.py b/common/split_spice.py
index d8c5539..f7cc695 100755
--- a/common/split_spice.py
+++ b/common/split_spice.py
@@ -48,9 +48,6 @@
 
     for line in inplines:
 
-        if subname == 'xrdn':
-            print('handling line in xrdn, file ' + in_file + ': "' + line + '"')
-
         # Item 1.  Handle comment lines
         if line.startswith('*'):
             if subcktlines != []:
@@ -65,14 +62,12 @@
         else:
             contline = False
             if inparam:
-                inparam = False 
+                inparam = False
             if inpinlist:
-                inpinlist = False 
+                inpinlist = False
 
         # Item 3.  Handle blank lines like comment lines
         if line.strip() == '':
-            if subname == 'xrdn':
-                print('blank line in xrdn subcircuit')
             if subcktlines != []:
                 subcktlines.append(line)
             else:
@@ -101,7 +96,7 @@
             else:
                 spicelines.append(line)
             continue
-        
+
         # model
         mmatch = modelrex.match(line)
         if mmatch:
@@ -151,6 +146,9 @@
                             print(line, file=ofile)
                         subcktlines = []
 
+                    # Add an include statement to this file in the source
+                    spicelines.append('.include ' + subckt_file)
+
                     insubckt = False
                     inmodel = False
                     subname = ''
diff --git a/sky130/magic/sky130.tech b/sky130/magic/sky130.tech
index ee75912..7e31c4c 100644
--- a/sky130/magic/sky130.tech
+++ b/sky130/magic/sky130.tech
@@ -5,7 +5,7 @@
 ###	magic;  this keeps compatibility between layouts
 ###	for all process variants.
 ###
-#----------------------------------------------------------
+#------------------------------------------------------------------------
 # Copyright (c) 2020 R. Timothy Edwards
 # Revisions:  See below
 #
@@ -14,10 +14,10 @@
 # process.  The file may be distributed under the terms
 # of the Apache 2.0 license agreement.
 #
-#----------------------------------------------------------
+#------------------------------------------------------------------------
 # This file is designed to be used with magic versions
 # 8.3.24 or newer.
-#----------------------------------------------------------
+#------------------------------------------------------------------------
 tech
   format 35
   TECHNAME
@@ -28,56 +28,56 @@
  description "SkyWater SKY130: PRE ALPHA Vendor Open Source rules and DRC"
 end
 
-#----------------------------------------------------------
+#------------------------------------------------------------------------
 # Status 7/10/20: Rev 1 (alpha):
 # First public release
-#--------------------------------------------------------------
+# Status 8/14/20: Rev 2 (alpha):
+# Started updating with new device/model naming convention
+#------------------------------------------------------------------------
 
-#--------------------------------------------------------------
+#------------------------------------------------------------------------
 # Supported device types
-#--------------------------------------------------------------
-# device name   magic ID layer  description
-#-------------------------------------------------------------
-# nshort	nfet		standard nFET
-# nshort	scnfet		standard nFET in standard cell**
-# npd		npd		special nFET in SRAM cell
-# npass		npass		special nFET in SRAM cell
-# nlowvt	nfetlvt		low Vt nFET
-# sonos_p/e	nsonos		SONOS nFET
-# pshort	pfet		standard pFET
-# pshort	scpfet		standard pFET in standard cell**
-# ppu		ppu		special pFET in SRAM cell
-# plowvt	pfetlvt		low Vt pFET
-# phighvt	pfethvt		high Vt pFET
-# ntvnative	---		native nFET
-# phv		mvpfet		thickox pFET
-# nhv		mvnfet		thickox nFET
-# nhvnative	mvnnfet		thickox native nFET
-# ndiode	ndiode		n+ diff diode
-# ndiode_h	mvndiode	thickox n+ diff diode
-# pdiode	pdiode		p+ diff diode
-# pdiode_h	mvpdiode	thickox p+ diff diode
-# ndiode_native	nndiode		diode with nndiff
-# ndiode_lvt	ndiodelvt	low Vt n+ diff diode
-# pdiode_lvt	pdiodelvt	low Vt p+ diff diode
-# pdiode_hvt	pdiodehvt	high Vt p+ diff diode
-# nwdiode	---		nwell diode
-# dnwdiode_psub	---		deep nwell diode to substrate
-# dnwdiode_pw	---		deep nwell diode to pwell
-# xcmimc1	mimcap		MiM cap 1st plate
-# xcmimc2	mimcap2		MiM cap 2nd plate
-# mrdn		rdn		n+ diff resistor
-# mrdn_hv	mvrdn		thickox n+ diff resistor
-# mrdp		rdp		p+ diff resistor
-# mrdp_hv	mvrdp		thickox p+ diff resistor
-# mrl1		rli		local interconnect resistor
-# mrp1		npres		n+ poly resistor
-# xhrpoly_*	ppres (*)	p+ poly resistor (300 Ohms/sq)
-# uhrpoly_*	xres (*)	p+ poly resistor (2k Ohms/sq)
-# xcnwvc	varactor	varactor (low Vt?)
-# xcnwvc2	varactorhvt	high Vt varactor
-# xchvnwc	mvvaractor	thickox varactor
-# xpwres	rpw		pwell resistor (in deep nwell)
+#------------------------------------------------------------------------
+# device name			magic ID layer	description
+#------------------------------------------------------------------------
+# sky130_fd_pr__nfet_01v8	nfet		standard nFET
+# sky130_fd_pr__nfet_01v8	scnfet		standard nFET in standard cell**
+# npd				npd		special nFET in SRAM cell
+# npass				npass		special nFET in SRAM cell
+# sky130_fd_pr__nfet_01v8_lvt	nfetlvt		low Vt nFET
+# sonos_p/e			nsonos		SONOS nFET
+# sky130_fd_pr__pfet_01v8	pfet		standard pFET
+# sky130_fd_pr__pfet_01v8	scpfet		standard pFET in standard cell**
+# ppu				ppu		special pFET in SRAM cell
+# sky130_fd_pr__pfet_01v8_lvt	pfetlvt		low Vt pFET
+# sky130_fd_pr__pfet_01v8_mvt	pfetmvt		med Vt pFET
+# sky130_fd_pr__pfet_01v8_hvt	pfethvt		high Vt pFET
+# sky130_fd_pr__nfet_03v3_nvt	---		native nFET
+# sky130_fd_pr__pfet_g5v0d10v5	mvpfet		thickox pFET
+# sky130_fd_pr__nfet_g5v0d10v5	mvnfet		thickox nFET
+# sky130_fd_pr__nfet_01v8_nvt	mvnnfet		thickox native nFET
+# sky130_fd_pr__diode_pw2nd	ndiode		n+ diff diode
+# ndiode_h			mvndiode	thickox n+ diff diode
+# sky130_fd_pr__diode_pd2nw	pdiode		p+ diff diode
+# pdiode_h			mvpdiode	thickox p+ diff diode
+# sky130_fd_pr__diode_pw2nd_nvt	nndiode		diode with nndiff
+# sky130_fd_pr__diode_pw2nd_lvt	ndiodelvt	low Vt n+ diff diode
+# sky130_fd_pr__diode_pd2nw_lvt	pdiodelvt	low Vt p+ diff diode
+# sky130_fd_pr__diode_pd2nw_hvt	pdiodehvt	high Vt p+ diff diode
+# xcmimc1			mimcap		MiM cap 1st plate
+# xcmimc2			mimcap2		MiM cap 2nd plate
+# mrdn				rdn		n+ diff resistor
+# mrdn_hv			mvrdn		thickox n+ diff resistor
+# mrdp				rdp		p+ diff resistor
+# mrdp_hv			mvrdp		thickox p+ diff resistor
+# mrl1				rli		local interconnect resistor
+# mrp1				npres		n+ poly resistor
+# xhrpoly_*			ppres (*)	p+ poly resistor (300 Ohms/sq)
+# uhrpoly_*			xres (*)	p+ poly resistor (2k Ohms/sq)
+# xcnwvc			varactor	varactor (low Vt?)
+# xcnwvc2			varactorhvt	high Vt varactor
+# xchvnwc			mvvaractor	thickox varactor
+# xpwres			rpw		pwell resistor (in deep nwell)
 #
 # (*) Note that ppres may extract into some generic type
 # called "xhrpoly", but only specific sizes of xhrpoly are
@@ -179,6 +179,7 @@
  -active mvvaractor,mvvaract,mvvar
 
  -active pmoslvt,pfetlvt
+ -active pmosmvt,pfetmvt
  -active pmoshvt,pfethvt
  -active nmoslvt,nfetlvt
  -active varactorhvt,varacthvt,varhvt
@@ -360,12 +361,6 @@
   padl m1 m2 m3 glass
 #endif  (!METAL5)
 
-  res0p35   implant1
-  res0p69   implant1
-  res1p41   implant1
-  res2p85   implant1
-  res5p73   implant1
-
 #ifdef REDISTRIBUTION
   mrdlc metal5 mrdl
 #endif (REDISTRIBUTION)
@@ -381,7 +376,7 @@
   allnwell	   nwell,obswell
 
   allnfets	   nfet,npass,npd,scnfet,mvnfet,mvnnfet,nfetlvt,nsonos
-  allpfets	   pfet,ppu,scpfet,mvpfet,pfethvt,pfetlvt
+  allpfets	   pfet,ppu,scpfet,mvpfet,pfethvt,pfetlvt,pfetmvt
   allfets	   allnfets,allpfets,varactor,mvvaractor,varhvt
 
   allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt
@@ -400,7 +395,7 @@
   allactiveres	   ndiffres,pdiffres,mvndiffres,mvpdiffres
 
   allndifflv       *ndif,*nsd,*ndiode,ndiffres,nfet,npass,npd,scnfet,nfetlvt,nsonos
-  allpdifflv       *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,pfetlvt,pfethvt
+  allpdifflv       *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,pfetlvt,pfetmvt,pfethvt
   alldifflv        allndifflv,allpdifflv
   allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt
   allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt
@@ -483,6 +478,7 @@
   psc       pdiff_in_pwell metal1  contact_X'es
 
   pfetlvt   ptransistor	ptransistor_stripes implant1
+  pfetmvt   ptransistor	ptransistor_stripes implant3
   pfethvt   ptransistor ptransistor_stripes implant2
   nfetlvt   ntransistor ntransistor_stripes implant1
   nsonos    ntransistor implant3
@@ -508,6 +504,12 @@
   xpc	    polysilicon	   pselect2  metal1  contact_X'es
   rmp	    polysilicon	   poly_resist_stripes
 
+  res0p35   implant1
+  res0p69   implant1
+  res1p41   implant1
+  res2p85   implant1
+  res5p73   implant1
+
   pdiode    pdiffusion     pselect2
   ndiode    ndiffusion     nselect2
   pdiodec   pdiffusion     pselect2 metal1 contact_X'es
@@ -823,6 +825,18 @@
 	calma 125 44
 
 #----------------------------------------------------------------
+# HVTR
+#----------------------------------------------------------------
+
+ layer HVTR  pfetmvt
+        grow 180
+	bridge	380 380
+	grow	185
+	shrink	185
+	close  265000
+	calma 18 20
+
+#----------------------------------------------------------------
 # HVTP
 #----------------------------------------------------------------
 
@@ -1494,116 +1508,147 @@
  options calma-permissive-labels
  gridlimit 5
 
+#----------------------------------------------------------------
+# Generate guard-band around nwells to keep FOM from crossing
+# Spacing from nwell = Diff/Tap 9 = 0.34um
+# Enclosure by nwell = Diff/Tap 8 = 0.18um
+#----------------------------------------------------------------
+ templayer	well_shrink nwell
+	shrink	180
+ templayer	well_guardband nwell
+	grow	340
+	and-not	well_shrink
+
 #---------------------------------------------------
-# FOM fill (under development)
+# Interleaved FOM and POLY fill
 #---------------------------------------------------
  templayer      slots_fom_pass1
 	bbox	top
         slots   0 4080 1320 0 4080 1320 1360 0
  templayer      obstruct_fom_pass1 alldiff,allpoly,rpw
         grow    500
+	or	well_guardband
  templayer	fomfill_pass1 slots_fom_pass1
         and-not obstruct_fom_pass1
         shrink  2035
         grow    2035
 
+#---------------------------------------------------
+
+ templayer      slots_poly_pass1
+	bbox	top
+        slots   0 720 360 0 720 360 240 0
+ templayer      obstruct_poly_pass1 alldiff,allpoly,rpw
+        grow    700
+	or	fomfill_pass1
+        grow    300
+	or	well_guardband
+ templayer	polyfill_pass1 slots_poly_pass1
+        and-not obstruct_poly_pass1
+        shrink  355
+        grow    355
+
+#---------------------------------------------------
+
  templayer      slots_fom_pass2
 	bbox	top
         slots   0 2500 1320 0 2500 1320 1360 0
  templayer      obstruct_fom_pass2 fomfill_pass1
         grow    820
-	or	alldiff,allpoly,rpw
-        grow    500
+        grow    200
+	or	polyfill_pass1
+        grow    300
+	or	obstruct_fom_pass1
  templayer	fomfill_pass2 slots_fom_pass2
         and-not obstruct_fom_pass2
         shrink  1245
         grow    1245
 
- templayer      slots_fom_coarse
-	bbox	top
-        slots   0 1500 1320 0 1500 1320 1360 0
- templayer      obstruct_fom_coarse fomfill_pass1,fomfill_pass2
-        grow    820
-	or	alldiff,allpoly,rpw
-        grow    500
- templayer	fomfill_coarse slots_fom_coarse
-        and-not obstruct_fom_coarse
-        shrink  745
-        grow    745
-
- templayer      slots_fom_fine
-	bbox	top
-        slots   0 500 400 0 500 400 160 0
- templayer      obstruct_fom_fine fomfill_pass1,fomfill_pass2,fomfill_coarse
-	grow	820
-	or	alldiff,allpoly,rpw
-        grow    500
- templayer	fomfill_fine slots_fom_fine
-        and-not obstruct_fom_fine
-        shrink  245
-        grow    245
-
- layer	FOMMASK    fomfill_pass1 
-	or	fomfill_pass2
-	or	fomfill_coarse
-	or	fomfill_fine
- 	calma 	23 0
-
 #---------------------------------------------------
-# POLY fill (under development)
-#---------------------------------------------------
- templayer      slots_poly_pass1
-	bbox	top
-        slots   0 720 360 0 720 360 240 0
- templayer      obstruct_poly_pass1 alldiff,allpoly,rpw
-        grow    1000
- templayer	polyfill_pass1 slots_poly_pass1
-        and-not obstruct_poly_pass1
-        shrink  355
-        grow    355
 
  templayer      slots_poly_coarse
 	bbox	top
         slots   0 720 360 0 720 360 240 120
- templayer      obstruct_poly_coarse alldiff,allpoly,rpw
-        grow    640
-	or	polyfill_pass1
-	grow	360
+ templayer      obstruct_poly_coarse polyfill_pass1
+	grow	60
+	or	fomfill_pass1,fomfill_pass2
+	grow	300
+	or	obstruct_poly_pass1
  templayer	polyfill_coarse slots_poly_coarse
         and-not obstruct_poly_coarse
         shrink  355
         grow    355
 
+#---------------------------------------------------
+
+ templayer      slots_fom_coarse
+	bbox	top
+        slots   0 1500 1320 0 1500 1320 1360 0
+ templayer      obstruct_fom_coarse fomfill_pass1,fomfill_pass2
+        grow    1020
+	or	polyfill_pass1,polyfill_coarse
+        grow    300
+	or	obstruct_fom_pass1
+ templayer	fomfill_coarse slots_fom_coarse
+        and-not obstruct_fom_coarse
+        shrink  745
+        grow    745
+
+#---------------------------------------------------
  templayer      slots_poly_medium
 	bbox	top
         slots   0 540 360 0 540 360 240 100
- templayer      obstruct_poly_medium alldiff,allpoly,rpw
-        grow    650
-	or	polyfill_pass1,polyfill_coarse
-	grow	360
+ templayer      obstruct_poly_medium polyfill_pass1,polyfill_coarse
+        grow    1010
+	or	obstruct_poly_pass1
  templayer	polyfill_medium slots_poly_medium
         and-not obstruct_poly_medium
         shrink  265
         grow    265
 
+#---------------------------------------------------
+
+ templayer      slots_fom_fine
+	bbox	top
+        slots   0 500 400 0 500 400 160 0
+ templayer      obstruct_fom_fine fomfill_pass1,fomfill_pass2,fomfill_coarse
+	grow	1320
+	or	obstruct_fom_pass1
+ templayer	fomfill_fine slots_fom_fine
+        and-not obstruct_fom_fine
+        shrink  245
+        grow    245
+
+#---------------------------------------------------
  templayer      slots_poly_fine
 	bbox	top
         slots   0 480 360 0 480 360 240 200
- templayer      obstruct_poly_fine alldiff,allpoly,rpw
+ templayer      obstruct_poly_fine polyfill_pass1,polyfill_coarse,polyfill_medium
         grow    650
 	or	polyfill_pass1,polyfill_coarse,polyfill_medium
 	grow	360
+	or	obstruct_poly_pass1
  templayer	polyfill_fine slots_poly_fine
         and-not obstruct_poly_fine
         shrink  235
         grow    235
 
- layer	POLYMASK    polyfill_pass1 
+#---------------------------------------------------
+ templayer	fomfill    fomfill_pass1 
+	or	fomfill_pass2
+	or	fomfill_coarse
+	or	fomfill_fine
+ 	calma 	23 0
+
+ templayer	polyfill    polyfill_pass1 
 	or	polyfill_coarse
 	or	polyfill_medium
 	or	polyfill_fine
  	calma 	28 0
 
+ layer	FOMMASK    fomfill
+ layer	POLYMASK    polyfill
+
 #---------------------------------------------------
 # MET1 fill
 #---------------------------------------------------
@@ -2086,6 +2131,10 @@
  and LVTN
  labels DIFF
 
+ layer pfetmvt pfetarea
+ and HVTR
+ labels DIFF
+
  layer pfethvt pfetarea
  and HVTP
  labels DIFF
@@ -3167,6 +3216,8 @@
  calma TAP  65 44
  # LVTN
  calma LVTN 125 44
+ # HVTR
+ calma HVTR 18 20
  # HVTP
  calma HVTP 78 44
  # SONOS (TUNM)
@@ -3503,7 +3554,7 @@
 
  surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt 40 absence_illegal \
 	"N-diffusion overlap of N-diffusion contact < %d (LIcon 5a)"
- surround pdc/a *pdiff,pfet,scpfet,ppu,pfethvt,pfetlvt 40 absence_illegal \
+ surround pdc/a *pdiff,pfet,scpfet,ppu,pfethvt,pfetmvt,pfetlvt 40 absence_illegal \
 	"P-diffusion overlap of P-diffusion contact < %d (LIcon 5a)"
  surround ndic/a *ndi 40 absence_illegal \
 	"N-diode overlap of N-diode contact < %d (LIcon 5a)"
@@ -3512,7 +3563,7 @@
 
  surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt 60 directional \
 	"N-diffusion overlap of N-diffusion contact < %d in one direction (LIcon 5c)"
- surround pdc/a *pdiff,pfet,scpfet,ppu,pfethvt,pfetlvt 60 directional \
+ surround pdc/a *pdiff,pfet,scpfet,ppu,pfethvt,pfetmvt,pfetlvt 60 directional \
 	"P-diffusion overlap of P-diffusion contact < %d in one direction (LIcon 5c)"
  surround ndic/a *ndi 60 directional \
 	"N-diode overlap of N-diode contact < %d in one direction (LIcon 5c)"
@@ -3759,7 +3810,7 @@
 	"Butting MV N-tap spacing to MV PMOS gate < %d (Poly 6)"
 
  # No LV FETs in HV diff
- spacing pfet,scpfet,ppu,pfetlvt,pfethvt,*pdiff *mvpdiff 360 touching_illegal \
+ spacing pfet,scpfet,ppu,pfetlvt,pfetmvt,pfethvt,*pdiff *mvpdiff 360 touching_illegal \
 	"LV P-diffusion to MV P-diffusion < %d (Diff/tap 23 + Diff/tap 22)"
 
  spacing nfet,scnfet,npd,npass,nfetlvt,varactor,varhvt,*ndiff *mvndiff 360 touching_illegal \
@@ -3933,14 +3984,14 @@
 
 
 extract
- style ngspice variants (lvs),(sim),(si)
+ style ngspice variants (),(orig),(si)
  cscale 1
  # NOTE: SkyWater SPICE libraries use .option scale 1E6 so all
  # dimensions must be in units of microns in the extract file.
  # Use extract style "ngspice(si)" to override this and produce
  # a file with SI units for length/area.
 
- variants (lvs),(sim)
+ variants (),(orig)
  lambda  1E6
  variants (si)
  lambda 1.0
@@ -4313,81 +4364,132 @@
 #ifdef REDISTRIBUTION
 #endif (REDISTRIBUTION)
 
-# Devices:  Use document (...)
+# Devices:  Base models (not subcircuit wrappers)
 
-variants (sim)
+variants (),(si)
 
- device msubcircuit pshort pfet,scpfet *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
- device msubcircuit ppu ppu *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
- device msubcircuit plowvt pfetlvt *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
- device msubcircuit phighvt pfethvt *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__pfet_01v8 pfet,scpfet \
+	*pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
+ device msubcircuit ppu ppu \
+	*pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__pfet_01v8_lvt pfetlvt \
+	*pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__pfet_01v8_mvt pfetmvt \
+	*pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__pfet_01v8_hvt pfethvt \
+	*pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w
 
- device msubcircuit nshort nfet,scnfet,npd,npass *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
- device msubcircuit npd npd *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
- device msubcircuit npass npass *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
- device msubcircuit nlowvt nfetlvt *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
- device msubcircuit sonos_e nsonos *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
- device subcircuit xcnwvc varactor *nndiff nwell error l=l w=w
- device subcircuit xcnwvc2 varhvt *nndiff nwell error l=l w=w
- device subcircuit xchvnwc mvvaractor *mvnndiff nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__nfet_01v8 nfet,scnfet,npd,npass \
+	*ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
+ device msubcircuit npd npd \
+	*ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
+ device msubcircuit npass npass \
+	*ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
+ device msubcircuit sky130_fd_pr__nfet_01v8_lvt nfetlvt \
+	*ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
+ device msubcircuit sonos_e nsonos \
+	*ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w
+ device subcircuit xcnwvc varactor \
+	*nndiff nwell error l=l w=w
+ device subcircuit xcnwvc2 varhvt \
+	*nndiff nwell error l=l w=w
+ device subcircuit xchvnwc mvvaractor \
+	*mvnndiff nwell error l=l w=w
 
- device msubcircuit phv mvpfet *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w
- device msubcircuit nhv mvnfet *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
- device msubcircuit nhvnative mvnnfet *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
+ device msubcircuit sky130_fd_pr__pfet_g5v0d10v5 mvpfet \
+	*mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w
+ device msubcircuit sky130_fd_pr__nfet_g5v0d10v5 mvnfet \
+	*mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
+ device msubcircuit sky130_fd_pr__nfet_05v0_nvt mvnnfet \
+	*mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w
 
- device rsubcircuit short rmp     *poly	 space/w,pwell,nwell error l=l w=w
- device rsubcircuit short rli1    *li,coreli space/w,pwell,nwell error l=l w=w
- device rsubcircuit short rmetal1 *metal1 space/w,pwell,nwell error l=l w=w
- device rsubcircuit short rmetal2 *metal2 space/w,pwell,nwell error l=l w=w
- device rsubcircuit short rmetal3 *metal3 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rmp \
+	*poly	 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rli1 \
+       *li,coreli space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rmetal1 \
+	*metal1 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rmetal2 \
+	*metal2 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rmetal3 \
+	*metal3 space/w,pwell,nwell error l=l w=w
 #ifdef METAL5
- device rsubcircuit short rm4 *m4 space/w,pwell,nwell error l=l w=w
- device rsubcircuit short rm5 *m5 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rm4 \
+	*m4 space/w,pwell,nwell error l=l w=w
+ device rsubcircuit short rm5 \
+	*m5 space/w,pwell,nwell error l=l w=w
 #endif (METAL5)
 
- device rsubcircuit xhrpoly_0p35  xhrpoly xpc pwell,space/w error +res0p35 l=l w=w
- device rsubcircuit xhrpoly_0p69  xhrpoly xpc pwell,space/w error +res0p69 l=l w=w
- device rsubcircuit xhrpoly_1p41  xhrpoly xpc pwell,space/w error +res1p41 l=l w=w
- device rsubcircuit xhrpoly_2p85  xhrpoly xpc pwell,space/w error +res2p85 l=l w=w
- device rsubcircuit xhrpoly_5p73  xhrpoly xpc pwell,space/w error +res5p73 l=l w=w
- device rsubcircuit xhrpoly  xhrpoly xpc pwell,space/w error l=l w=w
- device rsubcircuit uhrpoly_0p35  uhrpoly xpc pwell,space/w error +res0p35 l=l w=w
- device rsubcircuit uhrpoly_0p69  uhrpoly xpc pwell,space/w error +res0p69 l=l w=w
- device rsubcircuit uhrpoly_1p41  uhrpoly xpc pwell,space/w error +res1p41 l=l w=w
- device rsubcircuit uhrpoly_2p85  uhrpoly xpc pwell,space/w error +res2p85 l=l w=w
- device rsubcircuit uhrpoly_5p73  uhrpoly xpc pwell,space/w error +res5p73 l=l w=w
- device rsubcircuit uhrpoly  uhrpoly xpc pwell,space/w error l=l w=w
+ device rsubcircuit xhrpoly_0p35 xhrpoly \
+	xpc pwell,space/w error +res0p35 l=l w=w
+ device rsubcircuit xhrpoly_0p69  xhrpoly \
+	xpc pwell,space/w error +res0p69 l=l w=w
+ device rsubcircuit xhrpoly_1p41  xhrpoly \
+	xpc pwell,space/w error +res1p41 l=l w=w
+ device rsubcircuit xhrpoly_2p85  xhrpoly \
+	xpc pwell,space/w error +res2p85 l=l w=w
+ device rsubcircuit xhrpoly_5p73  xhrpoly \
+	xpc pwell,space/w error +res5p73 l=l w=w
+ device rsubcircuit xhrpoly  xhrpoly \
+	xpc pwell,space/w error l=l w=w
+ device rsubcircuit uhrpoly_0p35  uhrpoly \
+	xpc pwell,space/w error +res0p35 l=l w=w
+ device rsubcircuit uhrpoly_0p69  uhrpoly \
+	xpc pwell,space/w error +res0p69 l=l w=w
+ device rsubcircuit uhrpoly_1p41  uhrpoly \
+	xpc pwell,space/w error +res1p41 l=l w=w
+ device rsubcircuit uhrpoly_2p85  uhrpoly \
+	xpc pwell,space/w error +res2p85 l=l w=w
+ device rsubcircuit uhrpoly_5p73  uhrpoly \
+	xpc pwell,space/w error +res5p73 l=l w=w
+ device rsubcircuit uhrpoly  uhrpoly \
+	xpc pwell,space/w error l=l w=w
 
- device rsubcircuit mrp1     mrp1    *poly pwell,space/w error 	l=l w=w
+ device rsubcircuit mrp1     mrp1 \
+	*poly pwell,space/w error 	l=l w=w
 
- device rsubcircuit mrdn     ndiffres *ndiff pwell,space/w  error l=l w=w
- device rsubcircuit mrdp     pdiffres *pdiff nwell    error l=l w=w
- device rsubcircuit xpwres   rpw       pwell dnwell error l=l w=w
+ device rsubcircuit mrdn     ndiffres \
+	*ndiff pwell,space/w  error l=l w=w
+ device rsubcircuit mrdp     pdiffres \
+	*pdiff nwell    error l=l w=w
+ device rsubcircuit xpwres   rpw \
+        pwell dnwell error l=l w=w
 
- device rsubcircuit mrdn_hv  mvndiffres *mvndiff pwell,space/w error l=l w=w
- device rsubcircuit mrdp_hv  mvpdiffres *mvpdiff nwell   error l=l w=w
+ device rsubcircuit mrdn_hv  mvndiffres \
+	*mvndiff pwell,space/w error l=l w=w
+ device rsubcircuit mrdp_hv  mvpdiffres \
+	*mvpdiff nwell   error l=l w=w
 
- device subcircuit  pdiode *pdiode nwell a=a p=p
- device msubcircuit ndiode *ndiode pwell,space/w a=a p=p
- device subcircuit  pdiode_h *mvpdiode nwell a=a p=p
- device msubcircuit ndiode_h *mvndiode pwell,space/w a=a p=p
+ device subcircuit  sky130-fd_pr__diode_pd2nw *pdiode \
+	nwell a=a p=p
+ device msubcircuit sky130_fd_pr__diode_pw2nd *ndiode \
+	pwell,space/w a=a p=p
+ device subcircuit  pdiode_h *mvpdiode \
+	nwell a=a p=p
+ device msubcircuit ndiode_h *mvndiode \
+	pwell,space/w a=a p=p
 
  # These are parasitic devices
- device msubcircuit ndiode_lvt *ndiodelvt pwell,space/w a=a p=p
- device subcircuit  pdiode_lvt *pdiodelvt nwell a=a p=p
- device subcircuit  pdiode_hvt *pdiodehvt nwell a=a p=p
- device msubcircuit ndiode_native *nndiode pwell,space/w a=a p=p
+ device msubcircuit sky130_fd_pr__diode_pw2nd_lvt *ndiodelvt \
+	pwell,space/w a=a p=p
+ device subcircuit  sky130_fd_pr__diode_pd2nw_lvt *pdiodelvt \
+	nwell a=a p=p
+ device subcircuit  sky130_fd_pr_diode_pd2nw_hvt *pdiodehvt \
+	nwell a=a p=p
+ device msubcircuit sky130_fd_pr__diode_pw2nd_nvt *nndiode \
+	pwell,space/w a=a p=p
 
 #ifdef MIM
  device subcircuit xcmimc1 *mimcap  m3 nwell,pwell,space/w error a=a p=p s=subs
  device subcircuit xcmimc2 *mimcap2 m4,mimcc/m4 nwell,pwell,space/w error a=a p=p s=subs
 #endif (MIM)
 
- variants (lvs),(si)
+ variants (orig)
 
  device mosfet pshort scpfet,pfet pdiff,pdiffres,pdc nwell 
  device mosfet ppu ppu pdiff,pdiffres,pdc nwell 
  device mosfet plowvt pfetlvt pdiff,pdiffres,pdc nwell 
+ device mosfet pmedvt pfetmvt pdiff,pdiffres,pdc nwell 
  device mosfet phighvt pfethvt pdiff,pdiffres,pdc nwell 
  device mosfet nshort scnfet,npd,npass,nfet ndiff,ndiffres,ndc pwell,space/w
  device mosfet npd npd ndiff,ndiffres,ndc pwell,space/w