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foss-eda-tools/third_party/opencircuitdesign.com/open_pdks/3cf1a8989292fae85c31bf4759c79f596c055e80^!/.
commit
3cf1a8989292fae85c31bf4759c79f596c055e80
[log] [tgz]
author
M0stafaRady <mostafa.rady@efabless.com>
Tue Jun 13 01:30:31 2023 -0700
committer
M0stafaRady <mostafa.rady@efabless.com>
Tue Jun 13 01:30:31 2023 -0700
tree
bfc4b3538103283ff564d7bf089c1fa644e4a85c
parent
ae58227f18c0da71489baeb052f777252abfbd6b [diff]
fix indentation and update some ports orders

diff --git a/sky130/custom/sky130_fd_io/verilog/sky130_ef_io.v b/sky130/custom/sky130_fd_io/verilog/sky130_ef_io.v
index 5af04a6..893c550 100644
--- a/sky130/custom/sky130_fd_io/verilog/sky130_ef_io.v
+++ b/sky130/custom/sky130_fd_io/verilog/sky130_ef_io.v

@@ -32,22 +32,22 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VCCD),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VCCD),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.P_PAD(VCCD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -82,28 +82,28 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VCCD),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VCCD),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
 
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif // USE_POWER_PINS
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif // USE_POWER_PINS
 	.P_PAD(VCCD_PAD),
-  .AMUXBUS_A(AMUXBUS_A),
+	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
   );
 
@@ -136,25 +136,25 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VDDA)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDA),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif 
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDA),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif 
 	.P_PAD(VDDA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -185,22 +185,22 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VDDA)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDA),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDA),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.P_PAD(VDDA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -235,27 +235,27 @@
 
   // Instantiate the underlying power pad (connects P_PAD and VDDIO_Q to VDDIO)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDIO),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDIO),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif // USE_POWER_PINS
 	.P_PAD(VDDIO_PAD),
-  .AMUXBUS_A(AMUXBUS_A),
+	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
   );
 
@@ -286,22 +286,22 @@
 
   // Instantiate the underlying power pad (connects P_PAD and VDDIO_Q to VDDIO)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDIO),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDIO),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.P_PAD(VDDIO_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -338,26 +338,26 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSD)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSD),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSD),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
 
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif // USE_POWER_PINS
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -388,22 +388,22 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSD)
   sky130_fd_io__top_ground_hvc_wpad sky130_fd_io__top_ground_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSD),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSD),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -438,25 +438,25 @@
 
   // Instantiate the underlying ground pad (connects G_PAD and VSSIO_Q to VSSIO)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSIO),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSIO),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSIO_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -490,22 +490,22 @@
 
   // Instantiate the underlying ground pad (connects G_PAD and VSSIO_Q to VSSIO)
   sky130_fd_io__top_ground_hvc_wpad sky130_fd_io__top_ground_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSIO),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSIO),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSIO_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -542,25 +542,25 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSA)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSA),
-	.OGC_LVC(),
-	.BDY2_B2B(BDY2_B2B),
-	.DRN_LVC1(DRN_LVC1),
-	.DRN_LVC2(DRN_LVC2),
-	.SRC_BDY_LVC1(SRC_BDY_LVC1),
-	.SRC_BDY_LVC2(SRC_BDY_LVC2),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSA),
+		.OGC_LVC(),
+		.BDY2_B2B(BDY2_B2B),
+		.DRN_LVC1(DRN_LVC1),
+		.DRN_LVC2(DRN_LVC2),
+		.SRC_BDY_LVC1(SRC_BDY_LVC1),
+		.SRC_BDY_LVC2(SRC_BDY_LVC2),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -591,22 +591,22 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSA)
   sky130_fd_io__top_ground_hvc_wpad sky130_fd_io__top_ground_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSA),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSA),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -782,46 +782,45 @@
 
 // Instantiate original version with metal4-only power bus
 sky130_fd_io__top_gpiov2 gpiov2_base (
-    .IN_H(IN_H),
-    .PAD_A_NOESD_H(PAD_A_NOESD_H),
-    .PAD_A_ESD_0_H(PAD_A_ESD_0_H),
-    .PAD_A_ESD_1_H(PAD_A_ESD_1_H),
-    .PAD(PAD),
-    .DM(DM),
-    .HLD_H_N(HLD_H_N),
-    .IN(IN),
-    .INP_DIS(INP_DIS),
-    .IB_MODE_SEL(IB_MODE_SEL),
-    .ENABLE_H(ENABLE_H),
-    .ENABLE_VDDA_H(ENABLE_VDDA_H),
-    .ENABLE_INP_H(ENABLE_INP_H),
-    .OE_N(OE_N),
-    .TIE_HI_ESD(TIE_HI_ESD),
-    .TIE_LO_ESD(TIE_LO_ESD),
-    .SLOW(SLOW),
-    .VTRIP_SEL(VTRIP_SEL),
-    .HLD_OVR(HLD_OVR),
-    .ANALOG_EN(ANALOG_EN),
-    .ANALOG_SEL(ANALOG_SEL),
-    .ENABLE_VDDIO(ENABLE_VDDIO),
-    .ENABLE_VSWITCH_H(ENABLE_VSWITCH_H),
-    .ANALOG_POL(ANALOG_POL),
-    .OUT(OUT),
-    .AMUXBUS_A(AMUXBUS_A),
-    .AMUXBUS_B(AMUXBUS_B)
-  `ifdef USE_POWER_PINS
-    ,
-    .VSSA(VSSA),
-    .VDDA(VDDA),
-    .VSWITCH(VSWITCH),
-    .VDDIO_Q(VDDIO_Q),
-    .VCCHIB(VCCHIB),
-    .VDDIO(VDDIO),
-    .VCCD(VCCD),
-    .VSSIO(VSSIO),
-    .VSSD(VSSD),
-    .VSSIO_Q(VSSIO_Q) 
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q), 
+	`endif // USE_POWER_PINS
+	.IN_H(IN_H),
+	.PAD_A_NOESD_H(PAD_A_NOESD_H),
+	.PAD_A_ESD_0_H(PAD_A_ESD_0_H),
+	.PAD_A_ESD_1_H(PAD_A_ESD_1_H),
+	.PAD(PAD),
+	.DM(DM),
+	.HLD_H_N(HLD_H_N),
+	.IN(IN),
+	.INP_DIS(INP_DIS),
+	.IB_MODE_SEL(IB_MODE_SEL),
+	.ENABLE_H(ENABLE_H),
+	.ENABLE_VDDA_H(ENABLE_VDDA_H),
+	.ENABLE_INP_H(ENABLE_INP_H),
+	.OE_N(OE_N),
+	.TIE_HI_ESD(TIE_HI_ESD),
+	.TIE_LO_ESD(TIE_LO_ESD),
+	.SLOW(SLOW),
+	.VTRIP_SEL(VTRIP_SEL),
+	.HLD_OVR(HLD_OVR),
+	.ANALOG_EN(ANALOG_EN),
+	.ANALOG_SEL(ANALOG_SEL),
+	.ENABLE_VDDIO(ENABLE_VDDIO),
+	.ENABLE_VSWITCH_H(ENABLE_VSWITCH_H),
+	.ANALOG_POL(ANALOG_POL),
+	.OUT(OUT),
+	.AMUXBUS_A(AMUXBUS_A),
+	.AMUXBUS_B(AMUXBUS_B)
 );
 
 endmodule
@@ -849,22 +848,22 @@
 
   // Instantiate the underlying power pad (connects P_PAD and VDDIO_Q to VDDIO)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base (
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDIO),
-	.OGC_HVC(),
-	.DRN_HVC(VDDIO),
-	.SRC_BDY_HVC(VSSIO),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDIO),
+		.OGC_HVC(),
+		.DRN_HVC(VDDIO),
+		.SRC_BDY_HVC(VSSIO),
+	`endif // USE_POWER_PINS
 	.P_PAD(VDDIO_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -897,22 +896,22 @@
 
   // Instantiate the underlying ground pad (connects G_PAD and VSSIO_Q to VSSIO)
   sky130_fd_io__top_ground_hvc_wpad sky130_fd_io__top_ground_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSIO),
-	.OGC_HVC(VDDIO),
-	.DRN_HVC(VDDIO),
-	.SRC_BDY_HVC(VSSIO),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSIO),
+		.OGC_HVC(VDDIO),
+		.DRN_HVC(VDDIO),
+		.SRC_BDY_HVC(VSSIO),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSIO_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -945,22 +944,22 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VDDA)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base (
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VDDA),
-	.OGC_HVC(),
-	.DRN_HVC(VDDA),
-	.SRC_BDY_HVC(VSSA),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VDDA),
+		.OGC_HVC(),
+		.DRN_HVC(VDDA),
+		.SRC_BDY_HVC(VSSA),
+	`endif // USE_POWER_PINS
 	.P_PAD(VDDA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -991,22 +990,22 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSA)
   sky130_fd_io__top_ground_hvc_wpad sky130_fd_io__top_ground_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSA),
-	.OGC_HVC(),
-	.DRN_HVC(VDDA),
-	.SRC_BDY_HVC(VSSA),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSA),
+		.OGC_HVC(),
+		.DRN_HVC(VDDA),
+		.SRC_BDY_HVC(VSSA),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSA_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1038,25 +1037,25 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VCCD),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSA),
-	.DRN_LVC1(VCCD),
-	.DRN_LVC2(VCCD),
-	.SRC_BDY_LVC1(VSSIO),
-	.SRC_BDY_LVC2(VSSD),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VCCD),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSA),
+		.DRN_LVC1(VCCD),
+		.DRN_LVC2(VCCD),
+		.SRC_BDY_LVC1(VSSIO),
+		.SRC_BDY_LVC2(VSSD),
+	`endif // USE_POWER_PINS
 	.P_PAD(VCCD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1088,26 +1087,25 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSD)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base (
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSD),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSA),
-
-	.DRN_LVC1(VCCD),
-	.DRN_LVC2(VCCD),
-	.SRC_BDY_LVC1(VSSIO),
-	.SRC_BDY_LVC2(VSSD),
-  `endif 
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSD),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSA),
+		.DRN_LVC1(VCCD),
+		.DRN_LVC2(VCCD),
+		.SRC_BDY_LVC1(VSSIO),
+		.SRC_BDY_LVC2(VSSD),
+	`endif 
 	.G_PAD(VSSD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1139,25 +1137,25 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VCCD),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSIO),
-	.DRN_LVC1(VCCD),
-	.DRN_LVC2(VCCD),
-	.SRC_BDY_LVC1(VSSD),
-	.SRC_BDY_LVC2(VSSD),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VCCD),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSIO),
+		.DRN_LVC1(VCCD),
+		.DRN_LVC2(VCCD),
+		.SRC_BDY_LVC1(VSSD),
+		.SRC_BDY_LVC2(VSSD),
+	`endif // USE_POWER_PINS
 	.P_PAD(VCCD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1189,25 +1187,25 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSD)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSD),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSIO),
-	.DRN_LVC1(VCCD),
-	.DRN_LVC2(VCCD),
-	.SRC_BDY_LVC1(VSSD),
-	.SRC_BDY_LVC2(VSSD),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSD),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSIO),
+		.DRN_LVC1(VCCD),
+		.DRN_LVC2(VCCD),
+		.SRC_BDY_LVC1(VSSD),
+		.SRC_BDY_LVC2(VSSD),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1242,25 +1240,25 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD1)
   sky130_fd_io__top_power_lvc_wpad sky130_fd_io__top_power_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(VCCD1),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSIO),
-	.DRN_LVC1(VCCD1),
-	.DRN_LVC2(VCCD1),
-	.SRC_BDY_LVC1(VSSD1),
-	.SRC_BDY_LVC2(VSSD1),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(VCCD1),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSIO),
+		.DRN_LVC1(VCCD1),
+		.DRN_LVC2(VCCD1),
+		.SRC_BDY_LVC1(VSSD1),
+		.SRC_BDY_LVC2(VSSD1),
+	`endif // USE_POWER_PINS
 	.P_PAD(VCCD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1295,25 +1293,25 @@
 
   // Instantiate the underlying ground pad (connects G_PAD to VSSD1)
   sky130_fd_io__top_ground_lvc_wpad sky130_fd_io__top_ground_lvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.G_CORE(VSSD1),
-	.OGC_LVC(),
-	.BDY2_B2B(VSSIO),
-	.DRN_LVC1(VCCD1),
-	.DRN_LVC2(VCCD1),
-	.SRC_BDY_LVC1(VSSD1),
-	.SRC_BDY_LVC2(VSSD1),
-  `endif // USE_POWER_PINS
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.G_CORE(VSSD1),
+		.OGC_LVC(),
+		.BDY2_B2B(VSSIO),
+		.DRN_LVC1(VCCD1),
+		.DRN_LVC2(VCCD1),
+		.SRC_BDY_LVC1(VSSD1),
+		.SRC_BDY_LVC2(VSSD1),
+	`endif // USE_POWER_PINS
 	.G_PAD(VSSD_PAD),
 	.AMUXBUS_A(AMUXBUS_A),
 	.AMUXBUS_B(AMUXBUS_B)
@@ -1347,29 +1345,28 @@
 
   // Instantiate the underlying power pad (connects P_PAD to VCCD)
   sky130_fd_io__top_power_hvc_wpadv2 sky130_fd_io__top_power_hvc_base ( 
-  `ifdef USE_POWER_PINS
-	.VSSA(VSSA),
-	.VDDA(VDDA),
-	.VSWITCH(VSWITCH),
-	.VDDIO_Q(VDDIO_Q),
-	.VCCHIB(VCCHIB),
-	.VDDIO(VDDIO),
-	.VCCD(VCCD),
-	.VSSIO(VSSIO),
-	.VSSD(VSSD),
-	.VSSIO_Q(VSSIO_Q),
-	.P_CORE(P_CORE),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS 
+	`ifdef USE_POWER_PINS
+		.VSSA(VSSA),
+		.VDDA(VDDA),
+		.VSWITCH(VSWITCH),
+		.VDDIO_Q(VDDIO_Q),
+		.VCCHIB(VCCHIB),
+		.VDDIO(VDDIO),
+		.VCCD(VCCD),
+		.VSSIO(VSSIO),
+		.VSSD(VSSD),
+		.VSSIO_Q(VSSIO_Q),
+		.P_CORE(P_CORE),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+		.OGC_HVC(),
+		.DRN_HVC(DRN_HVC),
+		.SRC_BDY_HVC(SRC_BDY_HVC),
+	`endif // USE_POWER_PINS
 	.P_PAD(P_PAD),
-	.OGC_HVC(),
-	.DRN_HVC(DRN_HVC),
-	.SRC_BDY_HVC(SRC_BDY_HVC),
-  `endif // USE_POWER_PINS
-  .AMUXBUS_A(AMUXBUS_A),
-	.AMUXBUS_B(AMUXBUS_B),
+	.AMUXBUS_A(AMUXBUS_A),
+	.AMUXBUS_B(AMUXBUS_B)
 );
 
 endmodule