# Makefile for efabless design kits for SkyWater Sky130:
#
#  sky130A      =  5-metal backend stack with dual MiM
#
# Written by Tim Edwards March 2019
# efabless corporation
# updated October 2019
# updated December 2019 (divide installation sections for individual tools)
# updated March 2020 (refactored the install process)
# updated May 2020 (changed to new process name Sky130)
#
# Instructions:
#
# Run "configure" from the top level directory.  Use the following
# configuration options to match your environment:
#
#	--enable-sky130-pdk[=<path>]
#		If enabled, install the skywater PDK.  If <path> is specified,
#		then the skywater PDK is expected to be found rooted at the
#		given path.  If not specified, then the skywater PDK will be
#		downloaded and installed to <repo root>/pdks.
#		If explicitly disabled, sky130 is skipped over entirely.
#
#	--with-sky130-link-targets=<value>
#		where <value> is one of "none" or "source".  If set to "source",
#		then where possible, the installed files are symbolic links
#		back to the source, rather than copies of the source.  The
#		default value is "none" if the option is not specified.
#
#	--with-ef-style
#		If specified, then the installation uses the efabless style,
#		which swaps the file hierarchy of file formats vs. IP libraries;
#		e.g., "gds/sky130_fd_sc_hd/" with ef-style, vs.
#		"sky130_fd_sc_hd/gds/" without it.
#
# Enable/disable for specific libraries to be installed (and downloaded if
# needed).  Libraries that are part of the open_pdks repository are enabled
# by default and must be disabled by passing an option to configure.  Libraries
# that are not part of the open_pdks repository are disabled by default and
# must be enabled by passing an option to configure.
#
# Internal libraries and tool setups that can be disabled are the following:
#
#	--disable-magic
#		Do not install setup files for the magic layout tool.
#
#	--disable-netgen
#		Do not install setup files for the netgen LVS tool.
#
#	--disable-irsim
#		Do not install setup files for the IRSIM simulation tool.
#
#	--disable-qflow
#		Do not install setup files for the qflow synthesis flow.
#
#	--disable-openlane
#		Do not install setup files for the openlane sythesis flow.
#
#	--disable-klayout
#		Do not install setup files for the klayout layout tool.
#
#
# NOTE:  The comments below are for features that have not yet been
# implemented.
#
# External (third-party) libraries and tool setups are the following (enabled
# by default):
#
#	--enable-alpha-sky130[=<path>]
#		If enabled, install the sky130_ml_xx_hd font library from
#		Paul Schulz on github.  If <path> is not specified, then the
#		font library will be cloned from the git repository and
#		installed.
#
#	--enable-xschem-sky130[=<path>]
#		If enabled, install the Sky130 setup for the xschem schematic
#		editor.  If <path> is specified, then the xschem setup is
#		expected to be found rooted at the given path.  If not
#		specified, then the xschem setup will be cloned from the
#		repository and installed.
#
# External (third-party) libraries and tool setups are the following (disabled
# by default):
#
#	--enable-sram-sky130[=<path>]
#		If enabled, install the sky130_sram_macros library from
#		efabless on github.   If <path> is not specified, then
#		the SRAM library will be cloned from the repository and
#		installed.
#
#	--enable-osu-t12-sky130[=<path>]
#		If enabled, install the sky130_osu_sc_t12 libraries from
#		foss-eda-tools on googlesource.   If <path> is not
#		specified, then the OSU standard cell library will be
#		clones from the repository and installed.
#
#	--enable-osu-t15-sky130[=<path>]
#		If enabled, install the sky130_osu_sc_t15 libraries from
#		foss-eda-tools on googlesource.   If <path> is not
#		specified, then the OSU standard cell library will be
#		clones from the repository and installed.
#
#	--enable-osu-t18-sky130[=<path>]
#		If enabled, install the sky130_osu_sc_t18 libraries from
#		foss-eda-tools on googlesource.   If <path> is not
#		specified, then the OSU standard cell library will be
#		clones from the repository and installed.
#
# The variables below are substituted from the configuration options:
#
#	SKYWATER_PATH: points to vendor sources
#	EF_STYLE: 1 for efabless style, 0 otherwise
#	LINK_TARGETS: link back to source or link to 1st PDK when possible
#
# Run "make" to stage the PDK for tool setup and vendor libraries
#
# Run "make install" to install all staged files.
#
# Run "make clean" to remove all staging files.
#
# Run "make veryclean" to remove all staging and make.log files.
#
# For the sake of simplicity, the "standard" installation can be done
# with the usual
#
#   make
#   make install
#   make clean
#
#--------------------------------------------------------------------
# This Makefile contains bash-isms
SHELL = bash
MV = mv
SED = @SED@

prefix = @prefix@
datarootdir = @datarootdir@
datadir = @datadir@

# Use git revision if this is a cloned repo;  otherwise get the revision
# from the VERSION file in the directory above.
GITREV = $(shell git describe --long)
ifeq (${GITREV},)
    REVISION = $(shell cat ../VERSION)
else
    REVISION = ${GITREV}
endif
TECH = sky130

# The run-time environment uses PDKPATH to override the PDK location,
# so prevent that from happening during PDK install.
unexport PDKPATH 

# If EF_STYLE is set to 1, then efabless naming conventions are
# used, otherwise the generic naming conventions are used.
# Mainly, the hierarchy of library names and file types is reversed
# (e.g., sky130_fd_sc_hd/lef vs. lef/sky130_fd_sc_hd).

# EF_STYLE = 0 | 1
EF_STYLE = @EF_STYLE@

# Normally it's fine to keep the staging path in a local directory,
# although /tmp or a dedicated staging area are also fine, as long
# as the install process can write to the path.

STAGING_PATH = $(shell pwd)

SHARED_PDKS_PATH = $(datadir)/pdk

# If LINK_TARGETS is set to "none", then files are copied
# from the SkyWater sources to the target.  If set to "source",
# symbolic links are made in the target directories pointing
# back to the SkyWater sources.  If set to the name of another
# PDK (e.g, "sky130A"), then symbolic links are made to the
# same files in that PDK, where they exist, and are copied
# from source, where they don't.

# LINK_TARGETS = source | none | sky130A
LINK_TARGETS = @SKY130_LINK_TARGETS@

# Paths:

# Path to skywater_pdk
SKYWATER_PATH = @SKY130_SOURCE_PATH@
ifneq ($(SKYWATER_PATH),)
    SKYWATER_LIBS_PATH = ${SKYWATER_PATH}/libraries
else
    SKYWATER_LIBS_PATH =
endif

# Path to independent library sources (to be added to configuration options).
ALPHA_PATH = @SKY130_ML_XX_HD_PATH@
XSCHEM_PATH = @XSCHEM_SKY130_PATH@
SRAM_PATH = @SKY130_SRAM_MACROS_PATH@
OSU_T12_PATH = @SKY130_OSU_T12_PATH@
OSU_T15_PATH = @SKY130_OSU_T15_PATH@
OSU_T18_PATH = @SKY130_OSU_T18_PATH@

PDK_URL = https://github.com/google/skywater-pdk
ALPHA_URL = https://github.com/PaulSchulz/sky130_pschulz_xx_hd
XSCHEM_URL = https://github.com/StefanSchippers/xschem_sky130
SRAM_URL = https://github.com/efabless/sky130_sram_macros
OSU_T12_URL = https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12
OSU_T15_URL = https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t15
OSU_T18_URL = https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t18

# NOTE:  Install destination is the git repository of the technology platform.
# Once updated in git, the git project can be distributed to all hosts.
#
ifeq (${EF_STYLE}, 1)
    CONFIG_DIR = .ef-config
    REV_DIR = ${REVISION}
else
    CONFIG_DIR = .config
    REV_DIR = .
endif

# EF process nodes created from the master sources
SKY130A = sky130A

ifeq (${LINK_TARGETS}, ${SKY130A})
    DIST_LINK_TARGETS = ${SHARED_PDKS_PATH}/${LINK_TARGETS}
else
    DIST_LINK_TARGETS = ${LINK_TARGETS}
endif

# Basic definitions for each EF process node
SKY130A_DEFS = -DTECHNAME=sky130A -DREVISION=${REVISION}

# Module definitions for each process node
# (Note that MOS is default and therefore not used anywhere)
SKY130A_DEFS += -DMETAL5 -DMIM -DREDISTRIBUTION
# SKY130A_DEFS += -DMETAL5 -DMIM

# Add staging path
SKY130A_DEFS += -DSTAGING_PATH=${STAGING_PATH}

# Record commit numbers for the nodeinfo.json file
OPEN_PDKS_COMMIT = $(shell git rev-parse HEAD)
ifeq (${OPEN_PDKS_COMMIT},)
    COMMIT_DEFS = -DOPEN_PDKS_COMMIT=${REVISION}
else
    COMMIT_DEFS = -DOPEN_PDKS_COMMIT=${OPEN_PDKS_COMMIT}
endif
ifeq (${ALPHA_PATH},)
    COMMIT_DEFS += -DALPHA_COMMIT="unknown"
else
    COMMIT_DEFS += -DALPHA_COMMIT=$(shell cd ${ALPHA_PATH} ; git rev-parse HEAD)
endif
ifeq (${SRAM_PATH},)
    COMMIT_DEFS += -DSRAM_COMMIT="unknown"
else
    COMMIT_DEFS += -DSRAM_COMMIT=$(shell cd ${SRAM_PATH} ; git rev-parse HEAD)
endif
ifeq (${OSU_T12_PATH},)
    COMMIT_DEFS += -DOSU_T12_COMMIT="unknown"
else
    COMMIT_DEFS += -DOSU_T12_COMMIT=$(shell cd ${OSU_T12_PATH} ; git rev-parse HEAD)
endif
ifeq (${OSU_T15_PATH},)
    COMMIT_DEFS += -DOSU_T15_COMMIT="unknown"
else
    COMMIT_DEFS += -DOSU_T15_COMMIT=$(shell cd ${OSU_T15_PATH} ; git rev-parse HEAD)
endif
ifeq (${OSU_T18_PATH},)
    COMMIT_DEFS += -DOSU_T18_COMMIT="unknown"
else
    COMMIT_DEFS += -DOSU_T18_COMMIT=$(shell cd ${OSU_T18_PATH} ; git rev-parse HEAD)
endif
ifeq (${SKYWATER_PATH},)
    COMMIT_DEFS += -DFD_PR_COMMIT="unknown"
    COMMIT_DEFS += -DFD_IO_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_HD_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_HDLL_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_HVL_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_HS_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_MS_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_LS_COMMIT="unknown"
    COMMIT_DEFS += -DFD_SC_LP_COMMIT="unknown"
else
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_pr/latest/cells),)
	COMMIT_DEFS += -DFD_PR_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_PR_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_pr/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_io/latest/cells),)
	COMMIT_DEFS += -DFD_IO_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_IO_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_io/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_hd/latest/cells),)
	COMMIT_DEFS += -DFD_SC_HD_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_HD_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_hd/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_hdll/latest/cells),)
	COMMIT_DEFS += -DFD_SC_HDLL_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_HDLL_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_hdll/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_hvl/latest/cells),)
	COMMIT_DEFS += -DFD_SC_HVL_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_HVL_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_hvl/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_hs/latest/cells),)
	COMMIT_DEFS += -DFD_SC_HS_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_HS_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_hs/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_ms/latest/cells),)
	COMMIT_DEFS += -DFD_SC_MS_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_MS_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_ms/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_ls/latest/cells),)
	COMMIT_DEFS += -DFD_SC_LS_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_LS_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_ls/latest)
    endif
    ifeq ($(wildcard ${SKYWATER_PATH}/libraries/sky130_fd_sc_lp/latest/cells),)
	COMMIT_DEFS += -DFD_SC_LP_COMMIT="unknown"
    else
	COMMIT_DEFS += -DFD_SC_LP_COMMIT=$(shell cd ${SKYWATER_PATH} ; git rev-parse @:libraries/sky130_fd_sc_lp/latest)
    endif
endif
COMMIT_DEFS += -DMAGIC_VERSION=$(shell magic -dnull -noconsole --version)
COMMIT_DEFS += -DOPEN_PDKS_VERSION=$(shell cat ../VERSION)

ifeq (${EF_STYLE}, 1)
    EF_FORMAT = -ef_format
    SKY130A_DEFS += -DEF_FORMAT
else
    EF_FORMAT = -std_format
endif

MAGICTOP = libs.tech/magic
NETGENTOP = libs.tech/netgen
IRSIMTOP = libs.tech/irsim
QFLOWTOP = libs.tech/qflow
KLAYOUTTOP = libs.tech/klayout
OPENLANETOP = libs.tech/openlane
XSCHEMTOP = libs.tech/xschem
XCIRCUITTOP = libs.tech/xcircuit
NGSPICETOP = libs.tech/ngspice

ifeq (${EF_STYLE}, 1)
    MAGICPATH = ${MAGICTOP}/${REVISION}
    MAGICCURRENT = ${MAGICTOP}/current
else
    MAGICPATH = ${MAGICTOP}
    MAGICCURRENT = ${MAGICTOP}
endif

# Currently, netgen, qflow, irsim, and klayout do not use revisioning (needs to change!)
NETGENPATH = ${NETGENTOP}
IRSIMPATH = ${IRSIMTOP}
QFLOWPATH = ${QFLOWTOP}
KLAYOUTPATH = ${KLAYOUTTOP}
OPENLANEPATH = ${OPENLANETOP}
XSCHEMPATH = ${XSCHEMTOP}
XCIRCUITPATH = ${XCIRCUITTOP}
NGSPICEPATH = ${NGSPICETOP}

MAGICTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${MAGICTOP}
NETGENTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${NETGENTOP}
IRSIMTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${IRSIMTOP}
QFLOWTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${QFLOWTOP}
KLAYOUTTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${KLAYOUTTOP}
OPENLANETOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${OPENLANETOP}
XSCHEMTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${XSCHEMTOP}
XCIRCUITTOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${XCIRCUITTOP}
NGSPICETOP_STAGING_A = ${STAGING_PATH}/${SKY130A}/${NGSPICETOP}

MAGIC_STAGING_A = ${STAGING_PATH}/${SKY130A}/${MAGICPATH}
NETGEN_STAGING_A = ${STAGING_PATH}/${SKY130A}/${NETGENPATH}
IRSIM_STAGING_A = ${STAGING_PATH}/${SKY130A}/${IRSIMPATH}
QFLOW_STAGING_A = ${STAGING_PATH}/${SKY130A}/${QFLOWPATH}
KLAYOUT_STAGING_A = ${STAGING_PATH}/${SKY130A}/${KLAYOUTPATH}
OPENLANE_STAGING_A = ${STAGING_PATH}/${SKY130A}/${OPENLANEPATH}
XSCHEM_STAGING_A = ${STAGING_PATH}/${SKY130A}/${XSCHEMPATH}
XCIRCUIT_STAGING_A = ${STAGING_PATH}/${SKY130A}/${XCIRCUITPATH}
NGSPICE_STAGING_A = ${STAGING_PATH}/${SKY130A}/${NGSPICEPATH}

SKY130A_DEFS += -DMAGIC_CURRENT=${MAGICCURRENT}

# Openlane has a number of files that are common to all digital
# standard cell libraries, so these are collected in one definition
# here:
OPENLANE_COMMON = config.tcl tracks.info no_synth.cells drc_exclude.cells
OPENLANE_COMMON += tribuff_map.v latch_map.v mux2_map.v mux4_map.v fa_map.v rca_map.v csa_map.v

# Where cpp syntax is followed, this is equivalent to cpp, but it does not
# mangle non-C source files under the belief that they are actually C code.
CPP   = ../common/preproc.py

# The following script in the ../common directory does most of the work of
# copying or linking the foundry vendor files to the target directory.
STAGE = set -f ; ../common/foundry_install.py ${EF_FORMAT}
ifneq ($(DESTDIR), )
INSTALL = ../common/staging_install.py -local $(DESTDIR) ${EF_FORMAT}
else
INSTALL = ../common/staging_install.py ${EF_FORMAT}
endif

# The script(s) below are used for custom changes to the vendor PDK files
ADDPROP = ../common/insert_property.py ${EF_FORMAT}

# List the EDA tools to install local setup files for
TOOLS = 

# KLAYOUT_DISABLED = 0 | 1
KLAYOUT_DISABLED = @KLAYOUT_DISABLED@
ifneq (${KLAYOUT_DISABLED}, 1)
        TOOLS += klayout
endif

# OPENLANE_DISABLED = 0 | 1
OPENLANE_DISABLED = @OPENLANE_DISABLED@
ifneq (${OPENLANE_DISABLED}, 1)
        TOOLS += openlane
endif

# QFLOW_DISABLED = 0 | 1
QFLOW_DISABLED = @QFLOW_DISABLED@
ifneq (${QFLOW_DISABLED}, 1)
        TOOLS += qflow
endif

# MAGIC_DISABLED = 0 | 1
MAGIC_DISABLED = @MAGIC_DISABLED@
ifneq (${MAGIC_DISABLED}, 1)
        TOOLS += magic
endif

# NETGEN_DISABLED = 0 | 1
NETGEN_DISABLED = @NETGEN_DISABLED@
ifneq (${NETGEN_DISABLED}, 1)
        TOOLS += netgen
endif

# IRSIM_DISABLED = 0 | 1
IRSIM_DISABLED = @IRSIM_DISABLED@
ifneq (${IRSIM_DISABLED}, 1)
        TOOLS += irsim
endif

# XSCHEM_DISABLED = 0 | 1
XSCHEM_DISABLED = @XSCHEM_DISABLED@
ifneq (${XSCHEM_DISABLED}, 1)
        TOOLS += xschem
endif

# XCIRCUIT_DISABLED = 0 | 1
XCIRCUIT_DISABLED = @XCIRCUIT_DISABLED@
ifneq (${XCIRCUIT_DISABLED}, 1)
        TOOLS += xcircuit
endif

# These definitions depend on the setting of EF_STYLE
ifeq (${EF_STYLE}, 1)
	IO_VERILOG = verilog/sky130_fd_io
	HD_VERILOG = verilog/sky130_fd_sc_hd
	HDLL_VERILOG = verilog/sky130_fd_sc_hdll
	HVL_VERILOG = verilog/sky130_fd_sc_hvl
	HS_VERILOG = verilog/sky130_fd_sc_hs
	MS_VERILOG = verilog/sky130_fd_sc_ms
	LS_VERILOG = verilog/sky130_fd_sc_ls
	LP_VERILOG = verilog/sky130_fd_sc_lp
	HD_TECHLEF = techLEF/sky130_fd_sc_hd
	HDLL_TECHLEF = techLEF/sky130_fd_sc_hdll
	MLXX_SCRIPTS = scripts/sky130_ml_xx_hd
	PR_SPICE = spi/sky130_fd_pr
	HVL_SPICE = spi/sky130_fd_sc_hvl
	HD_SPICE = spi/sky130_fd_sc_hd
	HVL_PATCH4 = 4b
	HVL_CDL = cdl/sky130_fd_sc_hvl
	SPIEXT = spi
else
	IO_VERILOG = sky130_fd_io/verilog
	HD_VERILOG = sky130_fd_sc_hd/verilog
	HDLL_VERILOG = sky130_fd_sc_hdll/verilog
	HVL_VERILOG = sky130_fd_sc_hvl/verilog
	HS_VERILOG = sky130_fd_sc_hs/verilog
	MS_VERILOG = sky130_fd_sc_ms/verilog
	LS_VERILOG = sky130_fd_sc_ls/verilog
	LP_VERILOG = sky130_fd_sc_lp/verilog
	HD_TECHLEF = sky130_fd_sc_hd/techlef
	HDLL_TECHLEF = sky130_fd_sc_hdll/techlef
	MLXX_SCRIPTS = sky130_ml_xx_hd/scripts
	PR_SPICE = sky130_fd_pr/spice
	HVL_SPICE = sky130_fd_sc_hvl/spice
	HD_SPICE = sky130_fd_sc_hd/spice
	HVL_PATCH4 = 4
	HVL_CDL = sky130_fd_sc_hvl/cdl
	SPIEXT = spice
endif

all: all-a

# Handle prerequisites (fetch and install the PDK and requested libraries)
prerequisites: pdk-repo alpha-repo xschem-repo sram-repo osu-t12-repo osu-t15-repo osu-t18-repo

pdk-repo:
	if test "x${SKYWATER_PATH}" != "x" ; then \
		if test -d "${SKYWATER_PATH}" ; then \
			echo "Using existing installation of SkyWater PDK from ${SKYWATER_PATH}" ; \
		else \
			echo "Downloading SkyWater PDK from ${PDK_URL}" ; \
			custom/scripts/pdk_download.sh ${PDK_URL} ${SKYWATER_PATH} ; \
		fi ; \
	fi

alpha-repo:
	if test "x${ALPHA_PATH}" != "x" ; then \
		if test -d "${ALPHA_PATH}" ; then \
			echo "Using existing installation of alphanumeric library from ${ALPHA_PATH}" ; \
		else \
			echo "Downloading alphanumeric library from ${ALPHA_URL}" ; \
			../scripts/download.sh ${ALPHA_URL} ${ALPHA_PATH} ; \
		fi ; \
	fi

sram-repo:
	if test "x${SRAM_PATH}" != "x" ; then \
		if test -d "${SRAM_PATH}" ; then \
			echo "Using existing installation of SRAM macro library from ${SRAM_PATH}" ; \
		else \
			echo "Downloading SRAM macro library from ${SRAM_URL}" ; \
			../scripts/download.sh ${SRAM_URL} ${SRAM_PATH} ; \
		fi ; \
	fi

xschem-repo:
	if test "x${XSCHEM_PATH}" != "x" ; then \
		if test -d "${XSCHEM_PATH}" ; then \
			echo "Using existing installation of xschem setup from ${XSCHEM_PATH}" ; \
		else \
			echo "Downloading xschem setup from ${XSCHEM_URL}" ; \
			../scripts/download.sh ${XSCHEM_URL} ${XSCHEM_PATH} ; \
		fi ; \
	fi

osu-t12-repo:
	if test "x${OSU_T12_PATH}" != "x" ; then \
		if test -d "${OSU_T12_PATH}" ; then \
			echo "Using existing installation of OSU T12 standard cell library from ${OSU_T12_PATH}" ; \
		else \
			echo "Downloading OSU standard T12 cell library from ${OSU_T12_URL}" ; \
			../scripts/download.sh ${OSU_T12_URL} ${OSU_T12_PATH} 0 ; \
		fi ; \
	fi

osu-t15-repo:
	if test "x${OSU_T15_PATH}" != "x" ; then \
		if test -d "${OSU_T15_PATH}" ; then \
			echo "Using existing installation of OSU T15 standard cell library from ${OSU_T15_PATH}" ; \
		else \
			echo "Downloading OSU standard T15 cell library from ${OSU_T15_URL}" ; \
			../scripts/download.sh ${OSU_T15_URL} ${OSU_T15_PATH} 0 ; \
		fi ; \
	fi

osu-t18-repo:
	if test "x${OSU_T18_PATH}" != "x" ; then \
		if test -d "${OSU_T18_PATH}" ; then \
			echo "Using existing installation of OSU T18 standard cell library from ${OSU_T18_PATH}" ; \
		else \
			echo "Downloading OSU standard T18 cell library from ${OSU_T18_URL}" ; \
			../scripts/download.sh ${OSU_T18_URL} ${OSU_T18_PATH} 0 ; \
		fi ; \
	fi

all-a: prerequisites
	echo "Starting sky130A PDK staging on "`date` > ${SKY130A}_make.log
	${MAKE} general-a
	${MAKE} tools-a
	${MAKE} vendor-a
	echo "Ended sky130A PDK staging on "`date` >> ${SKY130A}_make.log

general-a: ${TECH}.json
	mkdir -p ${STAGING_PATH}/${SKY130A}/${CONFIG_DIR}
	rm -f ${STAGING_PATH}/${SKY130A}/${CONFIG_DIR}/nodeinfo.json
	${CPP} ${SKY130A_DEFS} ${COMMIT_DEFS} ${TECH}.json \
		${STAGING_PATH}/${SKY130A}/${CONFIG_DIR}/nodeinfo.json

tools-a: $(addsuffix -a, $(TOOLS))

magic-a: magic/${TECH}.tech magic/${TECH}gds.tech magic/${TECH}.magicrc magic/${TECH}.tcl
	mkdir -p ${MAGICTOP_STAGING_A}
	mkdir -p ${MAGIC_STAGING_A}
	rm -f ${MAGICTOP_STAGING_A}/current
	rm -f ${MAGIC_STAGING_A}/${SKY130A}.tech
	rm -f ${MAGIC_STAGING_A}/${SKY130A}-GDS.tech
	rm -f ${MAGIC_STAGING_A}/${SKY130A}.tcl
	rm -f ${MAGIC_STAGING_A}/${SKY130A}-BindKeys
	rm -f ${MAGIC_STAGING_A}/magicrc
	if test "${EF_STYLE}" == "1" ; then \
	    (cd ${MAGICTOP_STAGING_A} ; ln -s ${REV_DIR} current) ; \
	fi
	cp -rp custom/scripts/seal_ring_generator ${MAGIC_STAGING_A}/.
	cp -rp custom/scripts/bump_bond_generator ${MAGIC_STAGING_A}/.
	cp custom/scripts/generate_fill.py ${MAGIC_STAGING_A}/.
	cp custom/scripts/check_density.py ${MAGIC_STAGING_A}/.
	cp custom/scripts/run_standard_drc.py ${MAGIC_STAGING_A}/.
	cp custom/scripts/check_antenna.py ${MAGIC_STAGING_A}/.
	${CPP} ${SKY130A_DEFS} magic/${TECH}.tech ${MAGIC_STAGING_A}/${SKY130A}.tech
	${CPP} ${SKY130A_DEFS} magic/${TECH}gds.tech ${MAGIC_STAGING_A}/${SKY130A}-GDS.tech
	${CPP} ${SKY130A_DEFS} magic/${TECH}.magicrc ${MAGIC_STAGING_A}/${SKY130A}.magicrc
	${CPP} ${SKY130A_DEFS} ../common/pdk.bindkeys ${MAGIC_STAGING_A}/${SKY130A}-BindKeys
	${CPP} ${SKY130A_DEFS} magic/${TECH}.tcl ${MAGIC_STAGING_A}/${SKY130A}.tcl
	${CPP} ${SKY130A_DEFS} ../common/pdk.tcl >> ${MAGIC_STAGING_A}/${SKY130A}.tcl

qflow-a: qflow/${TECH}.sh qflow/${TECH}.par
	mkdir -p ${QFLOWTOP_STAGING_A}
	mkdir -p ${QFLOW_STAGING_A}
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hd.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hd.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hdll.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hdll.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hs.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hs.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hvl.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_hvl.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_ls.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_ls.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_lp.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_lp.par
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_ms.sh
	rm -f ${QFLOW_STAGING_A}/sky130_fd_sc_ms.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_ls.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_ls.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_ms.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_ms.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_hs.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_12t_hs.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_ls.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_ls.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_ms.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_ms.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_hs.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_15t_hs.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_ls.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_ls.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_ms.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_ms.par
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_hs.sh
	rm -f ${QFLOW_STAGING_A}/sky130_osu_sc_18t_hs.par
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_hd -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_hd.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_hdll -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_hdll.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_hvl -DVOLTAGE=4v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_hvl.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_hs -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_hs.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_lp -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_lp.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_ls -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_ls.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_fd_sc_ms -DVOLTAGE=1v95 \
		qflow/${TECH}.sh ${QFLOW_STAGING_A}/sky130_fd_sc_ms.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_12t_ls qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_12t_ls.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_12t_ms qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_12t_ms.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_12t_hs qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_12t_hs.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_15t_ls qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_15t_ls.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_15t_ms qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_15t_ms.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_15t_hs qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_15t_hs.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_18t_ls qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_18t_ls.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_18t_ms qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_18t_ms.sh
	${CPP} ${SKY130A_DEFS} -DLIBRARY=sky130_osu_sc_18t_hs qflow/sky130osu.sh \
		${QFLOW_STAGING_A}/sky130_osu_sc_18t_hs.sh
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_hd.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_hdll.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_hvl.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_hs.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_ms.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_lp.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par ${QFLOW_STAGING_A}/sky130_fd_sc_ls.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_12t_ls.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_12t_ms.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_12t_hs.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_15t_ls.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_15t_ms.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_15t_hs.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_18t_ls.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_18t_ms.par
	${CPP} ${SKY130A_DEFS} qflow/${TECH}.par \
			${QFLOW_STAGING_A}/sky130_osu_sc_18t_hs.par

netgen-a: netgen/${TECH}_setup.tcl
	mkdir -p ${NETGENTOP_STAGING_A}
	mkdir -p ${NETGEN_STAGING_A}
	rm -f ${NETGEN_STAGING_A}/${SKY130A}_setup.tcl
	rm -f ${NETGEN_STAGING_A}/setup.tcl
	${CPP} ${SKY130A_DEFS} netgen/${TECH}_setup.tcl \
		${NETGEN_STAGING_A}/${SKY130A}_setup.tcl
	(cd ${NETGEN_STAGING_A} ; ln -s ${SKY130A}_setup.tcl setup.tcl)

irsim-a: irsim
	mkdir -p ${IRSIMTOP_STAGING_A}
	mkdir -p ${IRSIM_STAGING_A}
	rm -f ${IRSIM_STAGING_A}/${SKY130A}_*.prm
	cp irsim/${SKY130A}_*.prm ${IRSIM_STAGING_A}/

klayout-a: klayout/${TECH}.lyp klayout/${TECH}.lyt
	mkdir -p ${KLAYOUTTOP_STAGING_A}
	mkdir -p ${KLAYOUT_STAGING_A}
	rm -f ${KLAYOUT_STAGING_A}/${SKY130A}.lyp
	rm -f ${KLAYOUT_STAGING_A}/${SKY130A}.lyt
	${CPP} ${SKY130A_DEFS} klayout/${TECH}.lyp ${KLAYOUT_STAGING_A}/${SKY130A}.lyp
	${CPP} ${SKY130A_DEFS} klayout/${TECH}.lyt ${KLAYOUT_STAGING_A}/${SKY130A}.lyt
	cp klayout/${TECH}.lydrc ${KLAYOUT_STAGING_A}/${SKY130A}.lydrc
	./custom/scripts/gen_run_drc.py -l ${KLAYOUT_STAGING_A}/${SKY130A}.lydrc \
		-o ${KLAYOUT_STAGING_A}/${SKY130A}.drc

xcircuit-a: xcircuit/${TECH}.xcircuitrc
	rm -rf ${XCIRCUIT_STAGING_A}
	mkdir -p ${XCIRCUITTOP_STAGING_A}
	mkdir -p ${XCIRCUIT_STAGING_A}
	rm -f ${XCIRCUIT_STAGING_A}/*.lps
	rm -f ${XCIRCUIT_STAGING_A}/${SKY130A}.xcircuitrc
	${CPP} ${SKY130A_DEFS} xcircuit/ngspice.lps ${XCIRCUIT_STAGING_A}/ngspice.lps
	${CPP} ${SKY130A_DEFS} xcircuit/sky130_fd_pr.lps \
		${XCIRCUIT_STAGING_A}/sky130_fd_pr.lps
	${CPP} ${SKY130A_DEFS} -DHD_SPICE=${HD_SPICE} -DSPIEXT=${SPIEXT} \
		xcircuit/sky130_fd_sc_hd.lps ${XCIRCUIT_STAGING_A}/sky130_fd_sc_hd.lps
	${CPP} ${SKY130A_DEFS} xcircuit/${TECH}.xcircuitrc \
		${XCIRCUIT_STAGING_A}/${SKY130A}.xcircuitrc

xschem-a: ${XSCHEM_PATH}
	rm -rf ${XSCHEM_STAGING_A}
	mkdir -p ${XSCHEMTOP_STAGING_A}
	mkdir -p ${XSCHEM_STAGING_A}
	# Copy the entire repository (other than .git, if it exists)
	if test "x${XSCHEM_PATH}" != "x" ; then \
	    cp -rp ${XSCHEM_PATH}/* ${XSCHEM_STAGING_A} ; \
	fi
	
	#add the correct libraries into the test files
	for file in ${XSCHEM_STAGING_A}/sky130_tests/* ; do \
		${SED} -i '/.include \\\\\\\\$$\:\:SKYWATER_MODELS/d' $$file ; \
		grep -zl 'sky130.lib.spice' $$file || ${SED} -z 's|format="tcleval( @value )"\nvalue="|format="tcleval( @value )"\nvalue="\n.lib \\\\\\\\$$\:\:SKYWATER_MODELS\\\\\\\\/sky130.lib.spice tt |' -i $$file ; \
		grep -zl 'format="tcleval( @value )".*value="' $$file || printf 'C {devices/code.sym} -170 0 0 0 {name=TT_MODELS\nonly_toplevel=true\nformat="tcleval( @value )"\nvalue="\n.lib \\\\\\\\$$\:\:SKYWATER_MODELS\\\\\\\\/sky130.lib.spice tt\n"}' >> $$file ; \
	done
	
	# Re-copy the xschemrc, with one change to add the PDK install path as
	# a component of XSCHEM_LIBRARY_PATH
	cat ${XSCHEM_PATH}/xschemrc | \
		${SED} -e "/PWD/aappend XSCHEM_LIBRARY_PATH :${XSCHEM_STAGING_A}" | \
		${SED} -e "/sky130_models.tcl/s#scripts#${XSCHEM_STAGING_A}/scripts#" | \
		${SED} -e "/netlist_dir/aset netlist_dir ." | \
		${SED} -e "/SKYWATER_MODELS/s#~/pdks/sky130A/libs.tech/ngspice#${NGSPICE_STAGING_A}#" | \
		${SED} -e "/SKYWATER_STDCELLS/s#~/pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice#${STAGING_PATH}/${SKY130A}/libs.ref/${HD_SPICE}#" \
		> ${XSCHEM_STAGING_A}/xschemrc
		
openlane-a: openlane/config.tcl openlane/rcx_rules.info openlane/sky130_fd_sc_hd/config.tcl  openlane/sky130_fd_sc_hs/config.tcl openlane/sky130_fd_sc_ms/config.tcl openlane/sky130_fd_sc_ls/config.tcl openlane/sky130_fd_sc_hdll/config.tcl openlane/sky130_osu_sc_t18/config.tcl
	mkdir -p ${OPENLANETOP_STAGING_A}
	mkdir -p ${OPENLANE_STAGING_A}
	rm -rf ${OPENLANE_STAGING_A}/custom_cells/*
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hd
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hs
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_ls
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_ms
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hdll
	mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hvl
	mkdir -p ${OPENLANE_STAGING_A}/sky130_osu_sc_t18
	rm -f ${OPENLANE_STAGING_A}/common_pdn.info
	rm -f ${OPENLANE_STAGING_A}/config.tcl
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_hd/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_hs/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_hdll/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_ls/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_ms/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_fd_sc_hvl/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    rm -f ${OPENLANE_STAGING_A}/sky130_osu_sc_t18/$$file ; \
	done

	cp -r openlane/custom_cells ${OPENLANE_STAGING_A}
	${CPP} ${SKY130A_DEFS} openlane/config.tcl ${OPENLANE_STAGING_A}/config.tcl
	${CPP} ${SKY130A_DEFS} openlane/rcx_rules.info ${OPENLANE_STAGING_A}/rcx_rules.info

	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_hd/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_hd/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_hs/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_hs/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_ms/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_ms/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_ls/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_ls/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_hdll/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_hdll/$$file ; \
	done
	for file in ${OPENLANE_COMMON} ; do \
	    ${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_fd_sc_hvl/$$file \
		${OPENLANE_STAGING_A}/sky130_fd_sc_hvl/$$file ; \
	done

	${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_osu_sc_t18/config.tcl \
		${OPENLANE_STAGING_A}/sky130_osu_sc_t18/config.tcl
	${CPP} -quiet ${SKY130A_DEFS} openlane/sky130_osu_sc_t18/tracks.info \
		${OPENLANE_STAGING_A}/sky130_osu_sc_t18/tracks.info

vendor-a:
	# Build targets conditionally based on what repositories or submodules
	# were selected or initialized.  To be done:  Allow a library version
	# to be specified that overrides "latest".
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_pr/latest/cells ; then \
		echo "Building primitives library and simulation models" ;\
		make primitive-a;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_io/latest/cells ; then \
		echo "Building padframe I/O libraries" ;\
		make io-a ;\
	fi
	# This assumes that at least the HD library submodule exists.  Also it
	# assumes that the same library version is used for all libraries, which
	# is fine with "latest" but otherwise probably invalid.
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_hd/latest/cells ; then \
		echo "Building digital high-density standard cell library" ;\
		make digital-hd-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_hvl/latest/cells ; then \
		echo "Building digital high-voltage standard cell library" ;\
		make digital-hvl-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_hdll/latest/cells ; then \
		echo "Building digital high-density low-leakage standard cell library" ;\
		make digital-hdll-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_lp/latest/cells ; then \
		echo "Building digital low-power standard cell library" ;\
		make digital-lp-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_hs/latest/cells ; then \
		echo "Building digital high-speed standard cell library" ;\
		make digital-hs-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_ms/latest/cells ; then \
		echo "Building digital medium-speed standard cell library" ;\
		make digital-ms-a ;\
	fi
	if test -d ${SKYWATER_LIBS_PATH}/sky130_fd_sc_ls/latest/cells ; then \
		echo "Building digital low-speed standard cell library" ;\
		make digital-ls-a ;\
	fi
	if test "x${ALPHA_PATH}" != "x" ; then \
		echo "Building alphanumeric layout libraries" ;\
		make alpha-a ;\
	fi
	if test "x${SRAM_PATH}" != "x" ; then \
		echo "Building SRAM macro library" ;\
		make sram-a ;\
	fi
	if test "x${OSU_T12_PATH}" != "x" ; then \
		echo "Building OSU 12-track-high standard cell library" ;\
		make osu-t12-a ;\
	fi
	if test "x${OSU_T15_PATH}" != "x" ; then \
		echo "Building OSU 15-track-high standard cell library" ;\
		make osu-t15-a ;\
	fi
	if test "x${OSU_T18_PATH}" != "x" ; then \
		echo "Building OSU 18-track-high standard cell library" ;\
		make osu-t18-a ;\
	fi

primitive-a:
	# Install device subcircuits from vendor files
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-ngspice sky130_fd_pr/latest/models/* \
		filter=custom/scripts/rename_models.py \
		2>&1 | tee -a ${SKY130A}_make.log
	# Install device layouts from custom sources
	${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
		-gds sky130_fd_pr/*.gds \
			options=custom/scripts/gds_import_setup.tcl \
		-library primitive sky130_fd_pr 2>&1 | tee -a ${SKY130A}_make.log
	# Install base device library from vendor files.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-gds %l/latest/cells/*/*.gds \
			no-copy=custom/sky130_fd_pr/*.gds \
			include=custom/sky130_fd_pr/*.gds \
			compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-cdl %l/latest/cells/*/*.cdl compile-only \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
		-spice %l/latest/cells/*/*.spice filter=custom/scripts/rename_cells.py \
		-library primitive sky130_fd_pr 2>&1 | tee -a ${SKY130A}_make.log
	# Custom:  Add "short" resistor model and subcircuit to the r+c models file
	cat ./custom/models/short.spice >> \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice/sky130_fd_pr__model__r+c.model.spice
	# Custom:  Add diodes as subcircuits to the r+c models file
	cat ./custom/models/diode.spice >> \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice/sky130_fd_pr__model__r+c.model.spice
	# Custom:  Add resistors as subcircuits to the r+c models file
	cat ./custom/models/resistor.spice >> \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice/sky130_fd_pr__model__r+c.model.spice

	# Custom:  Patch the models to work around ngspice issue with the relative
	# order of the "nf" and "mult" parameters.
	patch -p4 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE} \
		< custom/patches/sky130_fd_pr.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	patch -p1 -f -d ${STAGING_PATH}/${SKY130A} \
		< custom/patches/sky130_fd_pr_2.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Patch the models to remove the substrate pin from the PNP
	# device, which has no independent substrate pin (collector=substrate)
	patch -p4 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE} \
		< custom/patches/sky130_fd_pr_3.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Patch the ngspice models to add the HV diffusion resistor subcircuits
	patch -p2 -f -d ${STAGING_PATH}/${SKY130A}/libs.tech/ngspice \
		< custom/patches/sky130_fd_pr_5.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Fix up the PNP model file before running the next modification
	head -15 ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__pnp_05v5_W3p40L3p40.model.spice > ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/temp
	tail -39 ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__pnp_05v5_W3p40L3p40.model.spice >> ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/temp
	mv ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/temp  ${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__pnp_05v5_W3p40L3p40.model.spice
	# Custom:  Add the PNP 3.4x3.4um device model to the includes in "all.spice"
	./custom/scripts/fix_spice_includes.py ${EF_FORMAT} \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice/all.spice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Parse the (commented out) statistics blocks and generate
	# ngspice-compatible monte carlo parameters for mismatch and process
	./custom/scripts/mismatch_params.py ${EF_FORMAT} \
		2>&1 | tee -a ${SKY130A}_make.log || true
	./custom/scripts/mismatch_params.py ${EF_FORMAT} \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	./custom/scripts/process_params.py \
		2>&1 | tee -a ${SKY130A}_make.log || true
	./custom/scripts/montecarlo_hack.py \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Change vt to local_vt in one file for Xyce compatibilty
	./custom/scripts/xyce_hack.py \
		${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__res_iso_pw.model.spice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Remove ACM model parameters from BSIM3 devices
	./custom/scripts/xyce_hack2.py \
		${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__special_nfet_pass.pm3.spice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	./custom/scripts/xyce_hack2.py \
		${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__special_pfet_pass.pm3.spice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	./custom/scripts/xyce_hack2.py \
		${STAGING_PATH}/${SKY130A}/libs.ref/${PR_SPICE}/sky130_fd_pr__special_nfet_latch.pm3.spice \
		2>&1 | tee -a ${SKY130A}_make.log || true

	# Install custom corrected/enhanced sky130.lib.spice
	cp custom/models/sky130.lib.spice \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice \
		2>&1 | tee -a ${SKY130A}_make.log || true
	# Custom:  Add special device ID layers to bipolar layouts in magic
	# to make the extraction models correct.
	./custom/scripts/add_bipolar_ids.py ${EF_FORMAT} \
		2>&1 | tee -a ${SKY130A}_make.log || true

	# Custom:  Add "spinit" file
	cat ./custom/models/spinit >> \
		${STAGING_PATH}/${SKY130A}/libs.tech/ngspice/spinit

io-a:
	# Install custom additions to I/O pad library
	${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
		-verilog %l/verilog/*.v \
		-cdl %l/cdl/*.cdl \
		-spice %l/spice/*.spice \
		-gds %l/gds/*.gds options=custom/scripts/gds_import_setup.tcl \
		-lef %l/lef/*.lef compile-only rename=sky130_ef_io \
		-library general sky130_fd_io 2>&1 | tee -a ${SKY130A}_make.log
	# Install SkyWater I/O pad library
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			include=custom/sky130_fd_io/cdl/*.cdl \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.lef annotate compile-only \
			include=custom/sky130_fd_io/lef/*.lef \
			exclude=*.magic.lef,sky130_ef_io.lef \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib \
		-gds %l/latest/cells/*/*.gds compile-only \
			sort=../common/sort_pdkfiles.py \
			options=custom/scripts/sky130_fd_io_import.tcl \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v \
			include=custom/sky130_fd_io/verilog/*.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library general sky130_fd_io 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${IO_VERILOG}/*.*.v
	# Add a maskhint set for the GPIO pad .mag view to prevent problems writing
	# when writing HVI to GDS during hierarchical adjustments.
	${ADDPROP} ${STAGING_PATH}/${SKY130A} sky130_fd_io sky130_fd_io__top_gpiov2 \
		"MASKHINTS_HVI 1346 17198 5828 19224 13700 1890 15920 2360 24 17522 1778 20612" -mag

digital-hd-a:
	# Install custom additions to standard cell libraries
	${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
		-gds %l/gds/*.gds options=custom/scripts/gds_import_setup.tcl \
		-lef %l/lef/*.lef \
		-verilog %l/verilog/*.v \
		-library digital sky130_fd_sc_hd 2>&1 | tee -a ${SKY130A}_make.log
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef \
			include=custom/sky130_fd_sc_hd/lef/sky130_ef*.lef \
			compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib filter=custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			no-copy=custom/sky130_fd_sc_hd/gds/sky130_fd*.gds \
			include=custom/sky130_fd_sc_hd/gds/sky130_ef*.gds \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v \
			exclude=*.*.v include=custom/sky130_fd_sc_hd/verilog/*.v \
			compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_hd 2>&1 | tee -a ${SKY130A}_make.log
	# Add a maskhint set for the tap cell .mag view to prevent problems writing
	# when writing NSDM and PSDM to GDS during hierarchical adjustments.
	${ADDPROP} ${STAGING_PATH}/${SKY130A} sky130_fd_sc_hd sky130_fd_sc_hd__tapvpwrvgnd_1 \
		"MASKHINTS_PSDM 0 38 92 196" -mag
	${ADDPROP} ${STAGING_PATH}/${SKY130A} sky130_fd_sc_hd sky130_fd_sc_hd__tapvpwrvgnd_1 \
		"MASKHINTS_NSDM 0 280 92 506" -mag
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${HD_VERILOG}/*.*.v
	# Apply extra PDK patches until they get fixed properly in the source
	patch -p1 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HD_TECHLEF} \
		< custom/patches/hd_minenclosed.squeaky.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	patch -p1 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HD_VERILOG} \
		< custom/patches/hd_wire_syntax.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true

digital-hdll-a:
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_hdll 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${HDLL_VERILOG}/*.*.v
	# Apply extra PDK patches until they get fixed properly in the source
	patch -p1 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HDLL_TECHLEF} \
		< custom/patches/hdll_minenclosed.squeaky.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true

digital-hvl-a:
	# Install custom additions to standard cell libraries
	${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
		-gds %l/gds/*.gds options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_fd_sc_hvl 2>&1 | tee -a ${SKY130A}_make.log
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			include=custom/sky130_fd_sc_hvl/gds/sky130_ef*.gds \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_hvl 2>&1 | tee -a ${SKY130A}_make.log
	# Add a maskhint to the HVL level shifter to represent the HVI layer as
	# drawn in the GDS, and so eliminate the HVI-to-nwell DRC error.
	${ADDPROP} ${STAGING_PATH}/${SKY130A} sky130_fd_sc_hvl sky130_fd_sc_hvl__lsbufhv2lv_1 \
		"MASKHINTS_HVI 22 34 706 1316" -mag
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${HVL_VERILOG}/*.*.v
	# Custom:  Patch the HVL library to correct the resistor device names
	patch -p3 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HVL_SPICE} \
		< custom/patches/sky130_fd_pr_${HVL_PATCH4}.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true
	patch -p3 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HVL_CDL} \
		< custom/patches/sky130_fd_pr_6.patch \
		2>&1 | tee -a ${SKY130A}_make.log || true

digital-lp-a:
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_lp 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${LP_VERILOG}/*.*.v

digital-hs-a:
	# Install custom additions to standard cell libraries
	${STAGE} -source ./custom -target ${STAGING_PATH}/${SKY130A} \
		-gds %l/gds/*.gds options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_fd_sc_hs 2>&1 | tee -a ${SKY130A}_make.log
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			no-copy=custom/sky130_fd_sc_hs/gds/sky130_fd*.gds \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_hs 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${HS_VERILOG}/*.*.v

digital-ms-a:
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_ms 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${MS_VERILOG}/*.*.v

digital-ls-a:
	# Install all SkyWater digital standard cells.
	${STAGE} -source ${SKYWATER_LIBS_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef %l/latest/tech/*.tlef \
		-spice %l/latest/cells/*/*.spice compile-only \
			sort=../common/sort_pdkfiles.py \
			filter=custom/scripts/fix_device_models.py \
		-cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \
			sort=../common/sort_pdkfiles.py \
		-lef %l/latest/cells/*/*.magic.lef compile-only \
			sort=../common/sort_pdkfiles.py \
		-doc %l/latest/cells/*/*.pdf \
		-lib %l/latest/timing/*.lib custom/scripts/add_wireloads.py \
		-gds %l/latest/cells/*/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/models/*/*.v exclude=*.*.v compile-only \
			rename=primitives filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-verilog %l/latest/cells/*/*.*.v \
		-verilog %l/latest/cells/*/*.v exclude=*.*.v,primitives.v \
			compile-only filter=custom/scripts/inc_verilog.py \
			sort=../common/sort_pdkfiles.py \
		-library digital sky130_fd_sc_ls 2>&1 | tee -a ${SKY130A}_make.log
	# Remove the base verilog files which have already been included into
	# the libraries
	${RM} ${STAGING_PATH}/${SKY130A}/libs.ref/${LS_VERILOG}/*.*.v

alpha-a:
	# Install alphanumeric library.
	${STAGE} -source ${ALPHA_PATH}/.. -target ${STAGING_PATH}/${SKY130A} \
		-mag %l/mag/*.mag filter=custom/scripts/text2m5.py \
		-library general sky130_ml_xx_hd 2>&1 | tee -a ${SKY130A}_make.log
	# Install text2mag.py script for alphanumeric library
	mkdir -p ${STAGING_PATH}/${SKY130A}/libs.ref/${MLXX_SCRIPTS}
	cp custom/scripts/text2mag.py \
		${STAGING_PATH}/${SKY130A}/libs.ref/${MLXX_SCRIPTS}

sram-a:
	# Install SRAM library.  NOTE:  SRAM macros share some of the same
	# cell names, so use special option script gds_import_sram.tcl
	# To do:  Add option to process each GDS file individually in magic,
	# instead of all at once.
	${STAGE} -source ${SRAM_PATH}/.. -target ${STAGING_PATH}/${SKY130A} \
		-lef %l/*/*.lef \
		-lib %l/*/*.lib \
		-gds %l/*/*.gds options=custom/scripts/gds_import_sram.tcl \
		-spice %l/*/*.lvs.sp filter=custom/scripts/sp_to_spice.py \
		-verilog %l/*/*.v \
		-library general sky130_sram_macros 2>&1 | tee -a ${SKY130A}_make.log

osu-t12-a:
	# Install OSU T12 hs digital standard cells.
	${STAGE} -source ${OSU_T12_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_12T.tlef rename=sky130_osu_sc_12t_hs.tlef \
		-spice 12T_hs/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 12T_hs/lef/*.lef \
		-lib 12T_hs/lib/*.lib \
		-gds 12T_hs/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_12t_hs 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T12 ms digital standard cells.
	${STAGE} -source ${OSU_T12_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_12T.tlef rename=sky130_osu_sc_12t_ms.tlef \
		-spice 12T_ms/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 12T_ms/lef/*.lef \
		-lib 12T_ms/lib/*.lib \
		-gds 12T_ms/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_12t_ms 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T12 ls digital standard cells.
	${STAGE} -source ${OSU_T12_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_12T.tlef rename=sky130_osu_sc_12t_ls.tlef \
		-spice 12T_ls/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 12T_ls/lef/*.lef \
		-lib 12T_ls/lib/*.lib \
		-gds 12T_ls/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_12t_ls 2>&1 | tee -a ${SKY130A}_make.log

osu-t15-a:
	# Install OSU T15 hs digital standard cells.
	${STAGE} -source ${OSU_T15_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_15T.tlef rename=sky130_osu_sc_15t_hs.tlef \
		-spice 15T_hs/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 15T_hs/lef/*.lef \
		-lib 15T_hs/lib/*.lib \
		-gds 15T_hs/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_15t_hs 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T15 ms digital standard cells.
	${STAGE} -source ${OSU_T15_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_15T.tlef rename=sky130_osu_sc_15t_ms.tlef \
		-spice 15T_ms/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 15T_ms/lef/*.lef \
		-lib 15T_ms/lib/*.lib \
		-gds 15T_ms/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_15t_ms 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T15 ls digital standard cells.
	${STAGE} -source ${OSU_T15_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_15T.tlef rename=sky130_osu_sc_15t_ls.tlef \
		-spice 15T_ls/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 15T_ls/lef/*.lef \
		-lib 15T_ls/lib/*.lib \
		-gds 15T_ls/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_15t_ls 2>&1 | tee -a ${SKY130A}_make.log

osu-t18-a:
	# Install OSU T18 hs digital standard cells.
	${STAGE} -source ${OSU_T18_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_18T.tlef rename=sky130_osu_sc_18t_hs.tlef \
		-spice 18T_hs/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 18T_hs/lef/*.lef \
		-lib 18T_hs/lib/*.lib \
		-gds 18T_hs/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_18t_hs 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T18 ms digital standard cells.
	${STAGE} -source ${OSU_T18_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_18T.tlef rename=sky130_osu_sc_18t_ms.tlef \
		-spice 18T_ms/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 18T_ms/lef/*.lef \
		-lib 18T_ms/lib/*.lib \
		-gds 18T_ms/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_18t_ms 2>&1 | tee -a ${SKY130A}_make.log
	# Install OSU T18 ls digital standard cells.
	${STAGE} -source ${OSU_T18_PATH} -target ${STAGING_PATH}/${SKY130A} \
		-techlef sky130_osu_sc_18T.tlef rename=sky130_osu_sc_18t_ls.tlef \
		-spice 18T_ls/cdl/*.spice compile-only exclude=*.*.spice \
		-lef 18T_ls/lef/*.lef \
		-lib 18T_ls/lib/*.lib \
		-gds 18T_ls/gds/*.gds compile-only \
			options=custom/scripts/gds_import_setup.tcl \
		-library digital sky130_osu_sc_18t_ls 2>&1 | tee -a ${SKY130A}_make.log

install: install-a

install-a:
	echo "Starting SKY130 PDK migration on "`date` > ${SKY130A}_install.log
	${INSTALL} \
		-source ${STAGING_PATH}/${SKY130A} \
		-target ${SHARED_PDKS_PATH}/${SKY130A} \
		-variable PDKPATH \
		-link_from ${LINK_TARGETS} 2>&1 | tee -a ${SKY130A}_install.log
	echo "Ended SKY130 PDK migration on "`date` >> ${SKY130A}_install.log

uninstall: uninstall-a

uninstall-a:
	echo "Uninstalling SKY130 PDK from ${SHARED_PDKS_PATH}"
	if test "x${SHARED_PDKS_PATH}" != "x" ; then \
		${RM} -rf ${SHARED_PDKS_PATH}/${SKY130A} ; \
	fi
	echo "Finished SKY130 PDK uninstall"

clean: clean-a

clean-a:
	${STAGE} -target ${STAGING_PATH}/${SKY130A} -clean

veryclean: veryclean-a

veryclean-a: clean-a
	${RM} ${SKY130A}_make.log
	${RM} ${SKY130A}_install.log
	# Legacy name
	${RM} ${SKY130A}_migrate.log

# Old aliases (retained for compatibility)
install-dist:
	$(warning "'make install-dist' has been replaced with 'make install'")
	make install

install-local:
	$(warning "'make install-local' has been replaced with 'make install'")
	make install

uninstall-dist:
	$(warning "'make uninstall-dist' has been replaced with 'make uninstall'")
	make uninstall

uninstall-local:
	$(warning "'make uninstall-local' has been replaced with 'make uninstall'")
	make uninstall

install-dist-a:
	$(warning "'make install-dist-a' has been replaced with 'make install'")
	make install

install-local-a:
	$(warning "'make install-local-a' has been replaced with 'make install'")
	make install

uninstall-dist-a:
	$(warning "'make uninstall-dist-a' has been replaced with 'make uninstall'")
	make uninstall

uninstall-local-a:
	$(warning "'make uninstall-local-a' has been replaced with 'make uninstall'")
	make uninstall