tree 7700979dd227639fe4e5921ac5b8946c2f7523ef
parent e15b352961f5e302d2671b2850b820b60630b81a
author Tim Edwards <tim@opencircuitdesign.com> 1605282533 -0500
committer Tim Edwards <tim@opencircuitdesign.com> 1605282533 -0500

Revised the rule for checking (effectively) HVI to nwell spacing.  This
must use a cif-drc rule because the chech needs to be to LV nwell, not
HV nwell (which would have merged the HVI layer).  Otherwise there are
lots of false positive errors.