Revised the rule for checking (effectively) HVI to nwell spacing.  This
must use a cif-drc rule because the chech needs to be to LV nwell, not
HV nwell (which would have merged the HVI layer).  Otherwise there are
lots of false positive errors.

VERSION

diff --git a/VERSION b/VERSION
index 7eeb2c7..32c4ece 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.0.62
+1.0.63

sky130/magic/sky130.tech

diff --git a/sky130/magic/sky130.tech b/sky130/magic/sky130.tech
index 3cd4f54..0c83c7f 100644
--- a/sky130/magic/sky130.tech
+++ b/sky130/magic/sky130.tech
@@ -1511,6 +1511,9 @@
  grow-min 840
  bridge	700 600
 
+ # Simple spacing checks to lvnwell must use CIF-DRC rule
+ templayer allmvdiffnowell *mvndiff,*mvpsd
+
  templayer lvnwell nwell
  and-not mvnwell
 
@@ -5129,8 +5132,11 @@
 	"N-well overlap of MV varactor < %d (lvtn.10 + lvtn.4b)"
  spacing *mvndiode *mvndiode 1070 touching_ok \
 	"MV N-diode spacing < %d (hvntm.2 + 2 * hvntm.3)"
- spacing alldiffmv nwell 825 surround_ok \
-	"MV N-diffusion to nwell spacing < %d (hvi.5 + nsd/psd.5)"
+
+variants (full)
+ cifspacing allmvdiffnowell lvnwell 825 touching_illegal \
+	"MV diffusion to LV nwell spacing < %d (hvi.5 + nsd/psd.5)"
+variants (fast),(full)
 
  spacing allnfets allpactivenonfet 270 touching_illegal \
 	"nFET cannot abut P-diffusion (diff/tap.3)"