Added a patch for the "wire 1" syntax error in the sky130_fd_sc_hd
library verilog.  This error shows up when a specific flop type is
used in a gate-level verilog simulation.

VERSION

diff --git a/VERSION b/VERSION
index a8e0c72..b9159d8 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.0.229
+1.0.230

sky130/Makefile.in

diff --git a/sky130/Makefile.in b/sky130/Makefile.in
index f2a2c46..ead6552 100644
--- a/sky130/Makefile.in
+++ b/sky130/Makefile.in
@@ -1076,6 +1076,9 @@
 	patch -p1 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HD_TECHLEF} \
 		< custom/patches/hd_minenclosed.squeaky.patch \
 		2>&1 | tee -a ${SKY130A}_make.log || true
+	patch -p1 -f -d ${STAGING_PATH}/${SKY130A}/libs.ref/${HD_VERILOG} \
+		< custom/patches/hd_wire_syntax.patch \
+		2>&1 | tee -a ${SKY130A}_make.log || true
 
 digital-hdll-a:
 	# Install all SkyWater digital standard cells.

sky130/custom/patches/hd_wire_syntax.patch

diff --git a/sky130/custom/patches/hd_wire_syntax.patch b/sky130/custom/patches/hd_wire_syntax.patch
new file mode 100644
index 0000000..024fbcc
--- /dev/null
+++ b/sky130/custom/patches/hd_wire_syntax.patch
@@ -0,0 +1,18 @@
+--- verilog/sky130_fd_sc_hd.v	2021-10-13 14:50:14.821130287 -0400
++++ verilog_new/sky130_fd_sc_hd.v	2021-10-13 14:50:33.761129510 -0400
+@@ -37140,7 +37140,6 @@
+     wire D_delayed     ;
+     reg  notifier      ;
+     wire awake         ;
+-    wire 1             ;
+ 
+     //                                    Name     Output  Other arguments
+     not                                   not0    (GATE  , GATE_N_delayed                       );
+@@ -37282,7 +37281,6 @@
+     wire D_delayed     ;
+     reg  notifier      ;
+     wire awake         ;
+-    wire 1             ;
+ 
+     //                                    Name     Output  Other arguments
+     not                                   not0    (GATE  , GATE_N_delayed                       );