)]}'
{
  "commit": "11fb930268dcc81c0dffc45c0ea6fd27058fe26f",
  "tree": "3174cdd6659051ae3cd7c1e58f0ecd8ff98f3212",
  "parents": [
    "873074e407972cff98c11089fe66d4dc9db3d5cb"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Dec 28 21:26:02 2021 -0500"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Tue Dec 28 21:26:02 2021 -0500"
  },
  "message": "Added a custom file to correct the error in the sky130_fd_sc_hvl__lsbufhv2lv_1.spice\nfile in the skywater-pdk library.  The error is that the two independent\npower rails, which have the same port name in the SPICE netlist, were split into\ntwo nets, and one of the nets was not declared as a port, making the cell invalid.\nThe fix gives the two independent nets the same name, which is also invalid, and\nnot ideal, but it is consistent with the other files (LEF, verilog, etc.) and\nthe error resolves itself at the next level of hierarchy when running LVS, so it\nis usable that way.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5207e12cbea59d63388e7b9e1b5795716db90952",
      "old_mode": 33188,
      "old_path": "VERSION",
      "new_id": "00b4e508a5e6bdda5881bdf926f8454facee0739",
      "new_mode": 33188,
      "new_path": "VERSION"
    },
    {
      "type": "modify",
      "old_id": "f4e7bb3d0b25c93374b045ea499265c89d3f5002",
      "old_mode": 33188,
      "old_path": "sky130/Makefile.in",
      "new_id": "32bd1a06199fa52d92e502bcf50a3c268b901f1b",
      "new_mode": 33188,
      "new_path": "sky130/Makefile.in"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "bb2868e42859f3c9a2a5887f0a811b6099e9f3b6",
      "new_mode": 33188,
      "new_path": "sky130/custom/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl__lsbufhv2lv_1.spice"
    }
  ]
}