Implemented the change in pull request #156 (not doing a pull
request merge because the mirror database is behind the one on
opencircuitdesign.com).
diff --git a/sky130/openlane/common_pdn.tcl b/sky130/openlane/common_pdn.tcl
index 3bec0a3..3333054 100644
--- a/sky130/openlane/common_pdn.tcl
+++ b/sky130/openlane/common_pdn.tcl
@@ -45,6 +45,7 @@
$::env(FP_PDN_LOWER_LAYER) {width $::env(FP_PDN_VWIDTH) pitch $::env(FP_PDN_VPITCH) offset $::env(FP_PDN_VOFFSET)}
}
connect {}
+ pins { $::env(FP_PDN_LOWER_LAYER) }
}
# Assesses whether the deisgn is the core of the chip or not based on the value of $::env(DESIGN_IS_CORE) and uses the appropriate stdcell section
@@ -105,3 +106,4 @@
# POWER or GROUND #Upper metal stripes starting with power or ground rails at the left/bottom of the core area
set ::stripes_start_with "POWER" ;
+
