Modified the definition of device ppu to include HVTP, as otherwise
the SRAM core cell pFET gets interpreted as a pFET-HVT, which does
not have the right model bins for the SRAM device.
diff --git a/sky130/magic/sky130.tech b/sky130/magic/sky130.tech
index 0c83c7f..67c1da9 100644
--- a/sky130/magic/sky130.tech
+++ b/sky130/magic/sky130.tech
@@ -837,7 +837,7 @@
# HVTP
#----------------------------------------------------------------
- layer HVTP scpfethvt,pfethvt,varhvt,*pdiodehvt
+ layer HVTP scpfethvt,ppu,pfethvt,varhvt,*pdiodehvt
grow 180
bridge 380 380
grow 185
@@ -2272,7 +2272,7 @@
layer ppu pfetarea
and-not LVTN
- and-not HVTP
+ and HVTP
and COREID
labels DIFF
@@ -2287,6 +2287,7 @@
layer pfethvt pfetarea
and HVTP
and-not STDCELL
+ and-not COREID
labels DIFF
# Always force nwell under pfet (nwell encloses pdiff by 0.18)
