// Automatically modified by replacePGwithIfDef.pl
// iptguser	Thu Aug 18 13:10:15 EDT 2011

// Automatically edited by removePhraseFromMultipleFiles.pl
// iptguser	Mon Aug  8 14:40:00 EDT 2011
// \`suppress_faults;^\n
// \`ifdef TETRAMAX;^\n
// \`ifdef functional;\`else
// \`delay_mode_path;^\n
// \`disable_portfaults;\`nosuppress_faults

`celldefine
`timescale 1ns / 1ps

module scs8lp_busdrivernovlpsleep_20  (
output Z,

input A,
input TEB,
input SLEEP

`ifdef SC_USE_PG_PIN
, input vpwr
, input vgnd
, input kapwr
, input vpb
, input vnb
`endif

);

`ifdef functional
`else
`ifdef SC_USE_PG_PIN
`else
supply1 vpwr;
supply0 vgnd;
supply1 kapwr;
supply1 vpb;
supply0 vnb;
`endif
`endif

 
  wire NOR_TEB_SLEEP;


`ifdef functional
`else
	specify
		if( ~TEB ) (A +=> Z ) = (0.000:0.000:0.000,0.000:0.000:0.000);
		( TEB => Z ) = (0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000); // delays are t01,t10,t0Z,tZ1,t1Z,tZ0
		(SLEEP => Z ) = (0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000,0.000:0.000:0.000); // delays are t01,t10,t0Z,tZ1,t1Z,tZ0

	endspecify

  nor (NOR_TEB_SLEEP, TEB, SLEEP);
  bufif1 (ZGND , A , vpwr );
  bufif0 (ZPWR , ZGND , vgnd);
  bufif1  (Z , ZPWR , NOR_TEB_SLEEP );

`endif

endmodule
`endcelldefine