blob: 0a70da83054b4ec329d72d2e1efd70e81971078e [file] [log] [blame]
// type: AND3
`timescale 1ns/10ps
`celldefine
module sky130_osu_sc_AND3XL (Y, A, B, C);
output Y;
input A, B, C;
// Function
wire A__bar, B__bar, C__bar;
not (C__bar, C);
not (B__bar, B);
not (A__bar, A);
or (Y, A__bar, B__bar, C__bar);
// Timing
specify
(A => Y) = 0;
(B => Y) = 0;
(C => Y) = 0;
endspecify
endmodule
`endcelldefine