| #/************************************************** |
| # * Timing constraint file for partition tdsp_core |
| # * With clock latency adjustments |
| # **************************************************/ |
| create_clock -name {m_tdsp_clk} -period 3.300 -waveform { 0.000 1.600 } [list [get_ports {clk}]] |
| set_max_capacitance 0.012 [get_ports {clk}] |
| set_max_capacitance 0.259 [get_ports {reset}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[15]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[14]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[13]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[12]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[11]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[10]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[9]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[8]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[7]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[6]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[5]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[4]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[3]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[2]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[1]}] |
| set_max_capacitance 0.051 [get_ports {t_data_in[0]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[15]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[14]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[13]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[12]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[11]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[10]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[9]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[8]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[7]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[6]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[5]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[4]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[3]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[2]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[1]}] |
| set_max_capacitance 0.063 [get_ports {rom_data_in[0]}] |
| set_max_capacitance 0.025 [get_ports {bus_grant}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[15]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[14]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[13]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[12]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[11]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[10]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[9]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[8]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[7]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[6]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[5]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[4]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[3]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[2]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[1]}] |
| set_max_capacitance 0.259 [get_ports {port_pad_data_in[0]}] |
| set_max_capacitance 0.053 [get_ports {t_sdi[2]}] |
| set_max_capacitance 0.053 [get_ports {t_sdi[1]}] |
| set_max_capacitance 0.053 [get_ports {t_sdi[0]}] |
| set_max_capacitance 0.053 [get_ports {bio}] |
| set_max_capacitance 0.259 [get_ports {RC_CG_TEST_PORT}] |
| set_max_capacitance 0.259 [get_ports {DFT_sen}] |
| set_max_transition 1.000 [current_design] |
| set_max_transition 0.766 [get_ports {as}] |
| set_max_transition 0.767 [get_ports {read}] |
| set_max_transition 0.794 [get_ports {write}] |
| set_max_transition 0.502 [get_ports {address[7]}] |
| set_max_transition 0.503 [get_ports {address[6]}] |
| set_max_transition 0.503 [get_ports {address[5]}] |
| set_max_transition 0.503 [get_ports {address[4]}] |
| set_max_transition 0.501 [get_ports {address[3]}] |
| set_max_transition 0.503 [get_ports {address[2]}] |
| set_max_transition 0.502 [get_ports {address[1]}] |
| set_max_transition 0.514 [get_ports {address[0]}] |
| set_max_transition 0.514 [get_ports {t_data_out[15]}] |
| set_max_transition 0.515 [get_ports {t_data_out[14]}] |
| set_max_transition 0.507 [get_ports {t_data_out[13]}] |
| set_max_transition 0.512 [get_ports {t_data_out[12]}] |
| set_max_transition 0.520 [get_ports {t_data_out[11]}] |
| set_max_transition 0.520 [get_ports {t_data_out[10]}] |
| set_max_transition 0.517 [get_ports {t_data_out[9]}] |
| set_max_transition 0.512 [get_ports {t_data_out[8]}] |
| set_max_transition 0.513 [get_ports {t_data_out[7]}] |
| set_max_transition 0.512 [get_ports {t_data_out[6]}] |
| set_max_transition 0.516 [get_ports {t_data_out[5]}] |
| set_max_transition 0.520 [get_ports {t_data_out[4]}] |
| set_max_transition 0.511 [get_ports {t_data_out[3]}] |
| set_max_transition 0.518 [get_ports {t_data_out[2]}] |
| set_max_transition 0.518 [get_ports {t_data_out[1]}] |
| set_max_transition 0.517 [get_ports {t_data_out[0]}] |
| set_max_transition 0.505 [get_ports {p_address[8]}] |
| set_max_transition 0.507 [get_ports {p_address[7]}] |
| set_max_transition 0.507 [get_ports {p_address[6]}] |
| set_max_transition 0.508 [get_ports {p_address[5]}] |
| set_max_transition 0.506 [get_ports {p_address[4]}] |
| set_max_transition 0.506 [get_ports {p_address[3]}] |
| set_max_transition 0.506 [get_ports {p_address[2]}] |
| set_max_transition 0.508 [get_ports {p_address[1]}] |
| set_max_transition 0.507 [get_ports {p_address[0]}] |
| set_max_transition 0.787 [get_ports {bus_request}] |
| set_max_transition 0.840 [get_ports {port_address[2]}] |
| set_max_transition 0.832 [get_ports {port_address[1]}] |
| set_max_transition 0.844 [get_ports {port_address[0]}] |
| set_max_transition 0.848 [get_ports {port_pad_data_out[15]}] |
| set_max_transition 0.828 [get_ports {port_pad_data_out[14]}] |
| set_max_transition 0.820 [get_ports {port_pad_data_out[13]}] |
| set_max_transition 0.824 [get_ports {port_pad_data_out[12]}] |
| set_max_transition 0.837 [get_ports {port_pad_data_out[11]}] |
| set_max_transition 0.832 [get_ports {port_pad_data_out[10]}] |
| set_max_transition 0.829 [get_ports {port_pad_data_out[9]}] |
| set_max_transition 0.830 [get_ports {port_pad_data_out[8]}] |
| set_max_transition 0.835 [get_ports {port_pad_data_out[7]}] |
| set_max_transition 0.829 [get_ports {port_pad_data_out[6]}] |
| set_max_transition 0.821 [get_ports {port_pad_data_out[5]}] |
| set_max_transition 0.813 [get_ports {port_pad_data_out[4]}] |
| set_max_transition 0.829 [get_ports {port_pad_data_out[3]}] |
| set_max_transition 0.817 [get_ports {port_pad_data_out[2]}] |
| set_max_transition 0.815 [get_ports {port_pad_data_out[1]}] |
| set_max_transition 0.816 [get_ports {port_pad_data_out[0]}] |
| set_max_transition 0.815 [get_ports {port_as}] |
| set_max_transition 1.200 [get_ports {t_sdo[2]}] |
| set_max_transition 1.200 [get_ports {t_sdo[1]}] |
| set_max_transition 1.200 [get_ports {t_sdo[0]}] |
| set_false_path -setup -to [get_ports {t_sdo[2]}] |
| set_false_path -setup -to [get_ports {t_sdo[1]}] |
| set_false_path -setup -to [get_ports {t_sdo[0]}] |
| set_false_path -hold -from [get_ports {reset}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[15]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[14]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[13]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[12]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[11]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[10]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[9]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[8]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[7]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[6]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[5]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[4]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[3]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[2]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[1]}] |
| set_false_path -hold -from [get_ports {port_pad_data_in[0]}] |
| set_false_path -hold -from [get_ports {RC_CG_TEST_PORT}] |
| set_false_path -hold -from [get_ports {DFT_sen}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[15]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[14]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[13]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[12]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[11]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[10]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[9]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[8]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[7]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[6]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[5]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[4]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[3]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[2]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[1]}] |
| set_false_path -hold -to [get_ports {port_pad_data_out[0]}] |
| set_false_path -hold -to [get_ports {t_sdo[2]}] |
| set_false_path -hold -to [get_ports {t_sdo[1]}] |
| set_false_path -hold -to [get_ports {t_sdo[0]}] |
| |
| set_clock_latency 1.000 \ |
| [get_clocks {m_tdsp_clk}] |
| |
| set_clock_uncertainty 0.200 -setup [list [get_clocks {m_tdsp_clk}] ] |
| set_multicycle_path 3 -setup \ |
| -to [get_pins {EXECUTE_INST/p_reg*/state_remap/DFF/D}] |
| set_multicycle_path 3 -setup \ |
| -to [get_pins {EXECUTE_INST/acc*/state_remap/DFF/D}] |
| set_multicycle_path 3 -setup \ |
| -to [get_pins {EXECUTE_INST/ov_flag*/state_remap/DFF/D}] |
| set_multicycle_path 3 -hold \ |
| -to [get_pins {EXECUTE_INST/p_reg*/state_remap/DFF/D}] |
| set_multicycle_path 3 -hold \ |
| -to [get_pins {EXECUTE_INST/acc*/state_remap/DFF/D}] |
| set_multicycle_path 3 -hold \ |
| -to [get_pins {EXECUTE_INST/ov_flag*/state_remap/DFF/D}] |
| #set_multicycle_path 3 -setup \ |
| # -to [list [get_pins {EXECUTE_INST/p_reg*/D}] \ |
| # [get_pins {EXECUTE_INST/acc_reg*/D}] \ |
| # [get_pins {EXECUTE_INST/ov_flag_reg/D}] \ |
| # ] |
| |
| set_input_delay 2.5 -clock m_tdsp_clk [all_inputs] |
| set_output_delay 0.5 -clock m_tdsp_clk [all_outputs] |
| |