| { |
| "area": 59.1408, |
| "cell_footprint": "sdfsbp", |
| "cell_leakage_power": 0.0, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)", |
| "preset": "!SET_B" |
| }, |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin CLK": { |
| "capacitance": 0.002895, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002768, |
| "internal_power": { |
| "fall_power hidden_pwr_template13": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
| 0.0266641, |
| 0.026059, |
| 0.0254335, |
| 0.0248631, |
| 0.0242533, |
| 0.0237842, |
| 0.0233261, |
| 0.0231277, |
| 0.0230756, |
| 0.0229455, |
| 0.0229961, |
| 0.0233175, |
| 0.0240453 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
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| 0.0211342, |
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| 0.0203409, |
| 0.0203494, |
| 0.0205734, |
| 0.021121 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "min_pulse_width_high": 0.188482, |
| "min_pulse_width_low": 0.664137, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.003022 |
| }, |
| "pin D": { |
| "capacitance": 0.001869, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.00175, |
| "internal_power": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
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| 0.0057736, |
| 0.0052086, |
| 0.0047316, |
| 0.0042488, |
| 0.0038028, |
| 0.0033662, |
| 0.0030411, |
| 0.0027857, |
| 0.0026352, |
| 0.0026421 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
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| -0.0029501, |
| -0.0031634, |
| -0.0032586 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001989, |
| "timing": [ |
| { |
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| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
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| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
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| ], |
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| ], |
| [ |
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| [ |
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| ], |
| [ |
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| 0.7270976, |
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| [ |
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| [ |
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| [ |
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| 0.6233379, |
| 0.7201803, |
| 0.8109193, |
| 0.8955547 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint vio_10_10_1": { |
| "index_1": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
| "index_2": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
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| ], |
| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.4703431, |
| 0.5146953 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "fall_constraint vio_10_10_1": { |
| "index_1": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
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| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
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| [ |
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| [ |
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| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint vio_10_10_1": { |
| "index_1": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
| "index_2": [ |
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| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
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| "values": [ |
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| [ |
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| [ |
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| [ |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ", |
| "internal_power": [ |
| { |
| "fall_power scalar": { |
| "values": [ |
| 0.0 |
| ] |
| }, |
| "related_pin": "SET_B", |
| "rise_power pwr_template13x7": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
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| 0.29634, |
| 0.44449, |
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| 1, |
| 1.5 |
| ], |
| "index_2": [ |
| 0, |
| 0.00785, |
| 0.01571, |
| 0.03143, |
| 0.06287, |
| 0.12573, |
| 0.25146 |
| ], |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "pin SET_B": { |
| "capacitance": 0.00349, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.003412, |
| "internal_power": { |
| "fall_power hidden_pwr_template13": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
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| -0.0015815 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.02602, |
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| 0.13172, |
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| -0.0049841 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.003569, |
| "timing": [ |
| { |
| "related_pin": "CLK", |
| "rise_constraint vio_10_10_1": { |
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| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
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| 0.75, |
| 1.0, |
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| 1.5 |
| ], |
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| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
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| 1.5 |
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| [ |
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| ], |
| [ |
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| -0.4390807, |
| -0.433791 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "recovery_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "related_pin": "CLK", |
| "rise_constraint vio_10_10_1": { |
| "index_1": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
| "index_2": [ |
| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
| "values": [ |
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| 0.1425925, |
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| 0.1222474, |
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| ], |
| [ |
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| 0.1505189, |
| 0.1391256, |
| 0.1301738, |
| 0.1236634 |
| ], |
| [ |
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| 0.1509258, |
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| ], |
| [ |
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| 0.1757467, |
| 0.1667949, |
| 0.1602845 |
| ], |
| [ |
| 0.328123, |
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| 0.3096172, |
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| 0.2506165, |
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| 0.2127747, |
| 0.2062643 |
| ], |
| [ |
| 0.39811, |
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| 0.3206035, |
| 0.3043275, |
| 0.2917135, |
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| ], |
| [ |
| 0.4522279, |
| 0.4443014, |
| 0.433722, |
| 0.4198874, |
| 0.3995423, |
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| 0.3584453, |
| 0.3458314, |
| 0.3368796, |
| 0.3291484 |
| ], |
| [ |
| 0.4978008, |
| 0.4886537, |
| 0.4792949, |
| 0.4642396, |
| 0.4451152, |
| 0.421515, |
| 0.4040182, |
| 0.3914043, |
| 0.3824525, |
| 0.375942 |
| ], |
| [ |
| 0.5372702, |
| 0.5293437, |
| 0.519985, |
| 0.5049297, |
| 0.4858053, |
| 0.4622051, |
| 0.4447083, |
| 0.4320944, |
| 0.4231426, |
| 0.4154115 |
| ], |
| [ |
| 0.5730775, |
| 0.565151, |
| 0.5557923, |
| 0.540737, |
| 0.5216126, |
| 0.4980124, |
| 0.4805156, |
| 0.4679017, |
| 0.4589499, |
| 0.4524395 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "removal_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "fall_constraint pulse_width_template13": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
| 0.3839942, |
| 0.3893204, |
| 0.3957421, |
| 0.4048171, |
| 0.4195197, |
| 0.4432381, |
| 0.4777255, |
| 0.5294565, |
| 0.6109063, |
| 0.7408167, |
| 1.1111666, |
| 1.6666666, |
| 2.5 |
| ] |
| }, |
| "related_output_pin": "Q", |
| "related_pin": "SET_B", |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "min_pulse_width", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "test_cell": { |
| "ff IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D", |
| "preset": "!SET_B" |
| }, |
| "pin CLK": { |
| "direction": "input" |
| }, |
| "pin D": { |
| "direction": "input" |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin Q_N": { |
| "direction": "output", |
| "function": "IQ_N", |
| "signal_type": "test_scan_out_inverted" |
| }, |
| "pin SCD": { |
| "direction": "input", |
| "signal_type": "test_scan_in" |
| }, |
| "pin SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| }, |
| "pin SET_B": { |
| "direction": "input" |
| } |
| } |
| } |
