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  "area": 14.3856,
  "cell_footprint": "ebufn",
  "cell_leakage_power": 22.1219,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
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    "voltage_name": "VGND"
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  "pg_pin VNB": {
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    "voltage_name": "VNB"
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  "pg_pin VPB": {
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    "voltage_name": "VPB"
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  "pg_pin VPWR": {
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    "voltage_name": "VPWR"
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    "capacitance": 0.00262,
    "clock": "false",
    "direction": "input",
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
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  "pin TE_B": {
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    "clock": "false",
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    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
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    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
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